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Commit 4e382db3 authored by Yetunde Adebisi's avatar Yetunde Adebisi Committed by Jani Nikula
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drm/dp: Add definition for Display Control DPCD Registers capability size



This is used when reading Display Control capability Registers on the sink
device.

cc: dri-devel@lists.freedesktop.org
Signed-off-by: default avatarYetunde Adebisi <yetundex.adebisi@intel.com>
Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
Acked-by: default avatarDave Airlie <airlied@gmail.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1459865452-9138-2-git-send-email-yetundex.adebisi@intel.com
parent 060d4c33
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+1 −0
Original line number Diff line number Diff line
@@ -621,6 +621,7 @@ u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SI
#define DP_BRANCH_OUI_HEADER_SIZE	0xc
#define DP_RECEIVER_CAP_SIZE		0xf
#define EDP_PSR_RECEIVER_CAP_SIZE	2
#define EDP_DISPLAY_CTL_CAP_SIZE	3

void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);
void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]);