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Commit 4dc3c071 authored by Andrzej Hajda's avatar Andrzej Hajda Committed by Archit Taneja
Browse files

drm/bridge/sii8620: add delay during cbus reset 



Without delay CBUS sometimes was not reset properly.

Signed-off-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: default avatarArchit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1485935272-17337-17-git-send-email-a.hajda@samsung.com
parent 6bed9bc2

drivers/gpu/drm/bridge/sil-sii8620.c

+4 −5
Original line number Diff line number Diff line
@@ -892,11 +892,10 @@ static void sii8620_hw_reset(struct sii8620 *ctx) 


static void sii8620_cbus_reset(struct sii8620 *ctx)

{

	sii8620_write_seq_static(ctx,

		REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST

			| BIT_PWD_SRST_CBUS_RST_SW_EN,

		REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST_SW_EN

	);

	sii8620_write(ctx, REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST

		      | BIT_PWD_SRST_CBUS_RST_SW_EN);

	usleep_range(10000, 20000);

	sii8620_write(ctx, REG_PWD_SRST, BIT_PWD_SRST_CBUS_RST_SW_EN);

}



static void sii8620_set_auto_zone(struct sii8620 *ctx)