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Commit 4b059985 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
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drm/i915: Pipe palette registers need an offset on VLV 



Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 4e8e7eb7

drivers/gpu/drm/i915/i915_reg.h

+2 −2
Original line number Diff line number Diff line
@@ -1166,8 +1166,8 @@ 
 * Palette regs

 */



#define _PALETTE_A		0x0a000

#define _PALETTE_B		0x0a800

#define _PALETTE_A		(dev_priv->info->display_mmio_offset + 0xa000)

#define _PALETTE_B		(dev_priv->info->display_mmio_offset + 0xa800)

#define PALETTE(pipe) _PIPE(pipe, _PALETTE_A, _PALETTE_B)



/* MCH MMIO space */