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Commit 49502b23 authored by Enric Balletbo i Serra's avatar Enric Balletbo i Serra Committed by MyungJoo Ham
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dt-bindings: clock: add rk3399 DDR3 standard speed bins. 



DDR3 SDRAM Standard (JESD79-3F) defines some standard speed bins for
DDR3 memories. The rk3399_dmc driver allows you to pass these values via
the device tree. For that purpose the devfreq/rk3399_dmc.txt binding
refers to a ddr.h file which does not exist. This patch adds the missing
defines in a include file called rk3399-ddr.h with the definition of
standard speed bins according to the ARM Trusted Firmware (ATF).

Fixes: c1ceb8f7 (Documentation: bindings: add dt documentation for rk3399 dmc)
Signed-off-by: default avatarEnric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarMyungJoo Ham <myungjoo.ham@samsung.com>
parent 2d2894c9

Documentation/devicetree/bindings/devfreq/rk3399_dmc.txt

+1 −1
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@@ -19,7 +19,7 @@ Required properties: 


Following properties relate to DDR timing:



- rockchip,dram_speed_bin :	  Value reference include/dt-bindings/clock/ddr.h,

- rockchip,dram_speed_bin :	  Value reference include/dt-bindings/clock/rk3399-ddr.h,

				  it selects the DDR3 cl-trp-trcd type. It must be

				  set according to "Speed Bin" in DDR3 datasheet,

				  DO NOT use a smaller "Speed Bin" than specified

include/dt-bindings/clock/rk3399-ddr.h

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/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */



#ifndef DT_BINDINGS_DDR_H

#define DT_BINDINGS_DDR_H



/*

 * DDR3 SDRAM Standard Speed Bins include tCK, tRCD, tRP, tRAS and tRC for

 * each corresponding bin.

 */



/* DDR3-800 (5-5-5) */

#define DDR3_800D	0

/* DDR3-800 (6-6-6) */

#define DDR3_800E	1

/* DDR3-1066 (6-6-6) */

#define DDR3_1066E	2

/* DDR3-1066 (7-7-7) */

#define DDR3_1066F	3

/* DDR3-1066 (8-8-8) */

#define DDR3_1066G	4

/* DDR3-1333 (7-7-7) */

#define DDR3_1333F	5

/* DDR3-1333 (8-8-8) */

#define DDR3_1333G	6

/* DDR3-1333 (9-9-9) */

#define DDR3_1333H	7

/* DDR3-1333 (10-10-10) */

#define DDR3_1333J 	8

/* DDR3-1600 (8-8-8) */

#define DDR3_1600G	9

/* DDR3-1600 (9-9-9) */

#define DDR3_1600H	10

/* DDR3-1600 (10-10-10) */

#define DDR3_1600J	11

/* DDR3-1600 (11-11-11) */

#define DDR3_1600K	12

/* DDR3-1600 (10-10-10) */

#define DDR3_1866J	13

/* DDR3-1866 (11-11-11) */

#define DDR3_1866K	14

/* DDR3-1866 (12-12-12) */

#define DDR3_1866L	15

/* DDR3-1866 (13-13-13) */

#define DDR3_1866M	16

/* DDR3-2133 (11-11-11) */

#define DDR3_2133K	17

/* DDR3-2133 (12-12-12) */

#define DDR3_2133L	18

/* DDR3-2133 (13-13-13) */

#define DDR3_2133M	19

/* DDR3-2133 (14-14-14) */

#define DDR3_2133N	20

/* DDR3 ATF default */

#define DDR3_DEFAULT	21



#endif