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Commit 468f6eaf authored by Jann Horn's avatar Jann Horn Committed by Daniel Borkmann
Browse files

bpf: fix 32-bit ALU op verification



32-bit ALU ops operate on 32-bit values and have 32-bit outputs.
Adjust the verifier accordingly.

Fixes: f1174f77 ("bpf/verifier: rework value tracking")
Signed-off-by: default avatarJann Horn <jannh@google.com>
Signed-off-by: default avatarAlexei Starovoitov <ast@kernel.org>
Signed-off-by: default avatarDaniel Borkmann <daniel@iogearbox.net>
parent 0c17d1d2
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+17 −11
Original line number Original line Diff line number Diff line
@@ -2017,6 +2017,10 @@ static int adjust_ptr_min_max_vals(struct bpf_verifier_env *env,
	return 0;
	return 0;
}
}


/* WARNING: This function does calculations on 64-bit values, but the actual
 * execution may occur on 32-bit values. Therefore, things like bitshifts
 * need extra checks in the 32-bit case.
 */
static int adjust_scalar_min_max_vals(struct bpf_verifier_env *env,
static int adjust_scalar_min_max_vals(struct bpf_verifier_env *env,
				      struct bpf_insn *insn,
				      struct bpf_insn *insn,
				      struct bpf_reg_state *dst_reg,
				      struct bpf_reg_state *dst_reg,
@@ -2027,12 +2031,8 @@ static int adjust_scalar_min_max_vals(struct bpf_verifier_env *env,
	bool src_known, dst_known;
	bool src_known, dst_known;
	s64 smin_val, smax_val;
	s64 smin_val, smax_val;
	u64 umin_val, umax_val;
	u64 umin_val, umax_val;
	u64 insn_bitness = (BPF_CLASS(insn->code) == BPF_ALU64) ? 64 : 32;


	if (BPF_CLASS(insn->code) != BPF_ALU64) {
		/* 32-bit ALU ops are (32,32)->64 */
		coerce_reg_to_size(dst_reg, 4);
		coerce_reg_to_size(&src_reg, 4);
	}
	smin_val = src_reg.smin_value;
	smin_val = src_reg.smin_value;
	smax_val = src_reg.smax_value;
	smax_val = src_reg.smax_value;
	umin_val = src_reg.umin_value;
	umin_val = src_reg.umin_value;
@@ -2168,9 +2168,9 @@ static int adjust_scalar_min_max_vals(struct bpf_verifier_env *env,
		__update_reg_bounds(dst_reg);
		__update_reg_bounds(dst_reg);
		break;
		break;
	case BPF_LSH:
	case BPF_LSH:
		if (umax_val > 63) {
		if (umax_val >= insn_bitness) {
			/* Shifts greater than 63 are undefined.  This includes
			/* Shifts greater than 31 or 63 are undefined.
			 * shifts by a negative number.
			 * This includes shifts by a negative number.
			 */
			 */
			mark_reg_unknown(env, regs, insn->dst_reg);
			mark_reg_unknown(env, regs, insn->dst_reg);
			break;
			break;
@@ -2196,9 +2196,9 @@ static int adjust_scalar_min_max_vals(struct bpf_verifier_env *env,
		__update_reg_bounds(dst_reg);
		__update_reg_bounds(dst_reg);
		break;
		break;
	case BPF_RSH:
	case BPF_RSH:
		if (umax_val > 63) {
		if (umax_val >= insn_bitness) {
			/* Shifts greater than 63 are undefined.  This includes
			/* Shifts greater than 31 or 63 are undefined.
			 * shifts by a negative number.
			 * This includes shifts by a negative number.
			 */
			 */
			mark_reg_unknown(env, regs, insn->dst_reg);
			mark_reg_unknown(env, regs, insn->dst_reg);
			break;
			break;
@@ -2234,6 +2234,12 @@ static int adjust_scalar_min_max_vals(struct bpf_verifier_env *env,
		break;
		break;
	}
	}


	if (BPF_CLASS(insn->code) != BPF_ALU64) {
		/* 32-bit ALU ops are (32,32)->32 */
		coerce_reg_to_size(dst_reg, 4);
		coerce_reg_to_size(&src_reg, 4);
	}

	__reg_deduce_bounds(dst_reg);
	__reg_deduce_bounds(dst_reg);
	__reg_bound_offset(dst_reg);
	__reg_bound_offset(dst_reg);
	return 0;
	return 0;