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Commit 461c1491 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux-2.6

Pull GPIO bug fixes from Grant Likely:
 "Miscellaneous bug fixes to GPIO drivers and for a corner case in the
  gpio device tree parsing code."

* tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux-2.6:
  gpio/exynos: Fix compiler warning in gpio-samsung.c file
  gpio: Fix range check in of_gpio_simple_xlate()
  gpio: Fix uninitialized variable bit in adp5588_irq_handler
  gpio/sodaville: Convert sodaville driver to new irqdomain API
parents cf7d8a55 9a5c7d6e
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+1 −1
Original line number Original line Diff line number Diff line
@@ -430,7 +430,7 @@ config GPIO_ML_IOH


config GPIO_SODAVILLE
config GPIO_SODAVILLE
	bool "Intel Sodaville GPIO support"
	bool "Intel Sodaville GPIO support"
	depends on X86 && PCI && OF && BROKEN
	depends on X86 && PCI && OF
	select GPIO_GENERIC
	select GPIO_GENERIC
	select GENERIC_IRQ_CHIP
	select GENERIC_IRQ_CHIP
	help
	help
+1 −1
Original line number Original line Diff line number Diff line
@@ -252,7 +252,7 @@ static irqreturn_t adp5588_irq_handler(int irq, void *devid)
		if (ret < 0)
		if (ret < 0)
			memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat));
			memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat));


		for (bank = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO);
		for (bank = 0, bit = 0; bank <= ADP5588_BANK(ADP5588_MAXGPIO);
			bank++, bit = 0) {
			bank++, bit = 0) {
			pending = dev->irq_stat[bank] & dev->irq_mask[bank];
			pending = dev->irq_stat[bank] & dev->irq_mask[bank];


+8 −8
Original line number Original line Diff line number Diff line
@@ -2382,8 +2382,8 @@ static struct samsung_gpio_chip exynos4_gpios_3[] = {
#endif
#endif
};
};


static struct samsung_gpio_chip exynos5_gpios_1[] = {
#ifdef CONFIG_ARCH_EXYNOS5
#ifdef CONFIG_ARCH_EXYNOS5
static struct samsung_gpio_chip exynos5_gpios_1[] = {
	{
	{
		.chip	= {
		.chip	= {
			.base	= EXYNOS5_GPA0(0),
			.base	= EXYNOS5_GPA0(0),
@@ -2541,11 +2541,11 @@ static struct samsung_gpio_chip exynos5_gpios_1[] = {
			.to_irq	= samsung_gpiolib_to_irq,
			.to_irq	= samsung_gpiolib_to_irq,
		},
		},
	},
	},
#endif
};
};
#endif


static struct samsung_gpio_chip exynos5_gpios_2[] = {
#ifdef CONFIG_ARCH_EXYNOS5
#ifdef CONFIG_ARCH_EXYNOS5
static struct samsung_gpio_chip exynos5_gpios_2[] = {
	{
	{
		.chip	= {
		.chip	= {
			.base	= EXYNOS5_GPE0(0),
			.base	= EXYNOS5_GPE0(0),
@@ -2602,11 +2602,11 @@ static struct samsung_gpio_chip exynos5_gpios_2[] = {


		},
		},
	},
	},
#endif
};
};
#endif


static struct samsung_gpio_chip exynos5_gpios_3[] = {
#ifdef CONFIG_ARCH_EXYNOS5
#ifdef CONFIG_ARCH_EXYNOS5
static struct samsung_gpio_chip exynos5_gpios_3[] = {
	{
	{
		.chip	= {
		.chip	= {
			.base	= EXYNOS5_GPV0(0),
			.base	= EXYNOS5_GPV0(0),
@@ -2638,11 +2638,11 @@ static struct samsung_gpio_chip exynos5_gpios_3[] = {
			.label	= "GPV4",
			.label	= "GPV4",
		},
		},
	},
	},
#endif
};
};
#endif


static struct samsung_gpio_chip exynos5_gpios_4[] = {
#ifdef CONFIG_ARCH_EXYNOS5
#ifdef CONFIG_ARCH_EXYNOS5
static struct samsung_gpio_chip exynos5_gpios_4[] = {
	{
	{
		.chip	= {
		.chip	= {
			.base	= EXYNOS5_GPZ(0),
			.base	= EXYNOS5_GPZ(0),
@@ -2650,8 +2650,8 @@ static struct samsung_gpio_chip exynos5_gpios_4[] = {
			.label	= "GPZ",
			.label	= "GPZ",
		},
		},
	},
	},
#endif
};
};
#endif




#if defined(CONFIG_ARCH_EXYNOS) && defined(CONFIG_OF)
#if defined(CONFIG_ARCH_EXYNOS) && defined(CONFIG_OF)
+10 −13
Original line number Original line Diff line number Diff line
@@ -41,7 +41,7 @@
struct sdv_gpio_chip_data {
struct sdv_gpio_chip_data {
	int irq_base;
	int irq_base;
	void __iomem *gpio_pub_base;
	void __iomem *gpio_pub_base;
	struct irq_domain id;
	struct irq_domain *id;
	struct irq_chip_generic *gc;
	struct irq_chip_generic *gc;
	struct bgpio_chip bgpio;
	struct bgpio_chip bgpio;
};
};
@@ -51,10 +51,9 @@ static int sdv_gpio_pub_set_type(struct irq_data *d, unsigned int type)
	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
	struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
	struct sdv_gpio_chip_data *sd = gc->private;
	struct sdv_gpio_chip_data *sd = gc->private;
	void __iomem *type_reg;
	void __iomem *type_reg;
	u32 irq_offs = d->irq - sd->irq_base;
	u32 reg;
	u32 reg;


	if (irq_offs < 8)
	if (d->hwirq < 8)
		type_reg = sd->gpio_pub_base + GPIT1R0;
		type_reg = sd->gpio_pub_base + GPIT1R0;
	else
	else
		type_reg = sd->gpio_pub_base + GPIT1R1;
		type_reg = sd->gpio_pub_base + GPIT1R1;
@@ -63,11 +62,11 @@ static int sdv_gpio_pub_set_type(struct irq_data *d, unsigned int type)


	switch (type) {
	switch (type) {
	case IRQ_TYPE_LEVEL_HIGH:
	case IRQ_TYPE_LEVEL_HIGH:
		reg &= ~BIT(4 * (irq_offs % 8));
		reg &= ~BIT(4 * (d->hwirq % 8));
		break;
		break;


	case IRQ_TYPE_LEVEL_LOW:
	case IRQ_TYPE_LEVEL_LOW:
		reg |= BIT(4 * (irq_offs % 8));
		reg |= BIT(4 * (d->hwirq % 8));
		break;
		break;


	default:
	default:
@@ -91,7 +90,7 @@ static irqreturn_t sdv_gpio_pub_irq_handler(int irq, void *data)
		u32 irq_bit = __fls(irq_stat);
		u32 irq_bit = __fls(irq_stat);


		irq_stat &= ~BIT(irq_bit);
		irq_stat &= ~BIT(irq_bit);
		generic_handle_irq(sd->irq_base + irq_bit);
		generic_handle_irq(irq_find_mapping(sd->id, irq_bit));
	}
	}


	return IRQ_HANDLED;
	return IRQ_HANDLED;
@@ -127,7 +126,7 @@ static int sdv_xlate(struct irq_domain *h, struct device_node *node,
}
}


static struct irq_domain_ops irq_domain_sdv_ops = {
static struct irq_domain_ops irq_domain_sdv_ops = {
	.dt_translate	= sdv_xlate,
	.xlate = sdv_xlate,
};
};


static __devinit int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd,
static __devinit int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd,
@@ -149,10 +148,6 @@ static __devinit int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd,
	if (ret)
	if (ret)
		goto out_free_desc;
		goto out_free_desc;


	sd->id.irq_base = sd->irq_base;
	sd->id.of_node = of_node_get(pdev->dev.of_node);
	sd->id.ops = &irq_domain_sdv_ops;

	/*
	/*
	 * This gpio irq controller latches level irqs. Testing shows that if
	 * This gpio irq controller latches level irqs. Testing shows that if
	 * we unmask & ACK the IRQ before the source of the interrupt is gone
	 * we unmask & ACK the IRQ before the source of the interrupt is gone
@@ -179,7 +174,10 @@ static __devinit int sdv_register_irqsupport(struct sdv_gpio_chip_data *sd,
			IRQ_GC_INIT_MASK_CACHE, IRQ_NOREQUEST,
			IRQ_GC_INIT_MASK_CACHE, IRQ_NOREQUEST,
			IRQ_LEVEL | IRQ_NOPROBE);
			IRQ_LEVEL | IRQ_NOPROBE);


	irq_domain_add(&sd->id);
	sd->id = irq_domain_add_legacy(pdev->dev.of_node, SDV_NUM_PUB_GPIOS,
				sd->irq_base, 0, &irq_domain_sdv_ops, sd);
	if (!sd->id)
		goto out_free_irq;
	return 0;
	return 0;
out_free_irq:
out_free_irq:
	free_irq(pdev->irq, sd);
	free_irq(pdev->irq, sd);
@@ -260,7 +258,6 @@ static void sdv_gpio_remove(struct pci_dev *pdev)
{
{
	struct sdv_gpio_chip_data *sd = pci_get_drvdata(pdev);
	struct sdv_gpio_chip_data *sd = pci_get_drvdata(pdev);


	irq_domain_del(&sd->id);
	free_irq(pdev->irq, sd);
	free_irq(pdev->irq, sd);
	irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS);
	irq_free_descs(sd->irq_base, SDV_NUM_PUB_GPIOS);


+1 −1
Original line number Original line Diff line number Diff line
@@ -140,7 +140,7 @@ int of_gpio_simple_xlate(struct gpio_chip *gc,
	if (WARN_ON(gpiospec->args_count < gc->of_gpio_n_cells))
	if (WARN_ON(gpiospec->args_count < gc->of_gpio_n_cells))
		return -EINVAL;
		return -EINVAL;


	if (gpiospec->args[0] > gc->ngpio)
	if (gpiospec->args[0] >= gc->ngpio)
		return -EINVAL;
		return -EINVAL;


	if (flags)
	if (flags)