Loading drivers/mfd/db8500-prcmu.c +0 −19 Original line number Original line Diff line number Diff line Loading @@ -938,25 +938,6 @@ int db8500_prcmu_get_ddr_opp(void) return readb(PRCM_DDR_SUBSYS_APE_MINBW); return readb(PRCM_DDR_SUBSYS_APE_MINBW); } } /** * db8500_set_ddr_opp - set the appropriate DDR OPP * @opp: The new DDR operating point to which transition is to be made * Returns: 0 on success, non-zero on failure * * This function sets the operating point of the DDR. */ static bool enable_set_ddr_opp; int db8500_prcmu_set_ddr_opp(u8 opp) { if (opp < DDR_100_OPP || opp > DDR_25_OPP) return -EINVAL; /* Changing the DDR OPP can hang the hardware pre-v21 */ if (enable_set_ddr_opp) writeb(opp, PRCM_DDR_SUBSYS_APE_MINBW); return 0; } /* Divide the frequency of certain clocks by 2 for APE_50_PARTLY_25_OPP. */ /* Divide the frequency of certain clocks by 2 for APE_50_PARTLY_25_OPP. */ static void request_even_slower_clocks(bool enable) static void request_even_slower_clocks(bool enable) { { Loading include/linux/mfd/db8500-prcmu.h +0 −6 Original line number Original line Diff line number Diff line Loading @@ -538,7 +538,6 @@ int db8500_prcmu_get_arm_opp(void); int db8500_prcmu_set_ape_opp(u8 opp); int db8500_prcmu_set_ape_opp(u8 opp); int db8500_prcmu_get_ape_opp(void); int db8500_prcmu_get_ape_opp(void); int db8500_prcmu_request_ape_opp_100_voltage(bool enable); int db8500_prcmu_request_ape_opp_100_voltage(bool enable); int db8500_prcmu_set_ddr_opp(u8 opp); int db8500_prcmu_get_ddr_opp(void); int db8500_prcmu_get_ddr_opp(void); u32 db8500_prcmu_read(unsigned int reg); u32 db8500_prcmu_read(unsigned int reg); Loading Loading @@ -594,11 +593,6 @@ static inline int prcmu_release_usb_wakeup_state(void) return 0; return 0; } } static inline int db8500_prcmu_set_ddr_opp(u8 opp) { return 0; } static inline int db8500_prcmu_get_ddr_opp(void) static inline int db8500_prcmu_get_ddr_opp(void) { { return DDR_100_OPP; return DDR_100_OPP; Loading include/linux/mfd/dbx500-prcmu.h +0 −9 Original line number Original line Diff line number Diff line Loading @@ -269,10 +269,6 @@ unsigned long prcmu_clock_rate(u8 clock); long prcmu_round_clock_rate(u8 clock, unsigned long rate); long prcmu_round_clock_rate(u8 clock, unsigned long rate); int prcmu_set_clock_rate(u8 clock, unsigned long rate); int prcmu_set_clock_rate(u8 clock, unsigned long rate); static inline int prcmu_set_ddr_opp(u8 opp) { return db8500_prcmu_set_ddr_opp(opp); } static inline int prcmu_get_ddr_opp(void) static inline int prcmu_get_ddr_opp(void) { { return db8500_prcmu_get_ddr_opp(); return db8500_prcmu_get_ddr_opp(); Loading Loading @@ -489,11 +485,6 @@ static inline int prcmu_get_arm_opp(void) return ARM_100_OPP; return ARM_100_OPP; } } static inline int prcmu_set_ddr_opp(u8 opp) { return 0; } static inline int prcmu_get_ddr_opp(void) static inline int prcmu_get_ddr_opp(void) { { return DDR_100_OPP; return DDR_100_OPP; Loading Loading
drivers/mfd/db8500-prcmu.c +0 −19 Original line number Original line Diff line number Diff line Loading @@ -938,25 +938,6 @@ int db8500_prcmu_get_ddr_opp(void) return readb(PRCM_DDR_SUBSYS_APE_MINBW); return readb(PRCM_DDR_SUBSYS_APE_MINBW); } } /** * db8500_set_ddr_opp - set the appropriate DDR OPP * @opp: The new DDR operating point to which transition is to be made * Returns: 0 on success, non-zero on failure * * This function sets the operating point of the DDR. */ static bool enable_set_ddr_opp; int db8500_prcmu_set_ddr_opp(u8 opp) { if (opp < DDR_100_OPP || opp > DDR_25_OPP) return -EINVAL; /* Changing the DDR OPP can hang the hardware pre-v21 */ if (enable_set_ddr_opp) writeb(opp, PRCM_DDR_SUBSYS_APE_MINBW); return 0; } /* Divide the frequency of certain clocks by 2 for APE_50_PARTLY_25_OPP. */ /* Divide the frequency of certain clocks by 2 for APE_50_PARTLY_25_OPP. */ static void request_even_slower_clocks(bool enable) static void request_even_slower_clocks(bool enable) { { Loading
include/linux/mfd/db8500-prcmu.h +0 −6 Original line number Original line Diff line number Diff line Loading @@ -538,7 +538,6 @@ int db8500_prcmu_get_arm_opp(void); int db8500_prcmu_set_ape_opp(u8 opp); int db8500_prcmu_set_ape_opp(u8 opp); int db8500_prcmu_get_ape_opp(void); int db8500_prcmu_get_ape_opp(void); int db8500_prcmu_request_ape_opp_100_voltage(bool enable); int db8500_prcmu_request_ape_opp_100_voltage(bool enable); int db8500_prcmu_set_ddr_opp(u8 opp); int db8500_prcmu_get_ddr_opp(void); int db8500_prcmu_get_ddr_opp(void); u32 db8500_prcmu_read(unsigned int reg); u32 db8500_prcmu_read(unsigned int reg); Loading Loading @@ -594,11 +593,6 @@ static inline int prcmu_release_usb_wakeup_state(void) return 0; return 0; } } static inline int db8500_prcmu_set_ddr_opp(u8 opp) { return 0; } static inline int db8500_prcmu_get_ddr_opp(void) static inline int db8500_prcmu_get_ddr_opp(void) { { return DDR_100_OPP; return DDR_100_OPP; Loading
include/linux/mfd/dbx500-prcmu.h +0 −9 Original line number Original line Diff line number Diff line Loading @@ -269,10 +269,6 @@ unsigned long prcmu_clock_rate(u8 clock); long prcmu_round_clock_rate(u8 clock, unsigned long rate); long prcmu_round_clock_rate(u8 clock, unsigned long rate); int prcmu_set_clock_rate(u8 clock, unsigned long rate); int prcmu_set_clock_rate(u8 clock, unsigned long rate); static inline int prcmu_set_ddr_opp(u8 opp) { return db8500_prcmu_set_ddr_opp(opp); } static inline int prcmu_get_ddr_opp(void) static inline int prcmu_get_ddr_opp(void) { { return db8500_prcmu_get_ddr_opp(); return db8500_prcmu_get_ddr_opp(); Loading Loading @@ -489,11 +485,6 @@ static inline int prcmu_get_arm_opp(void) return ARM_100_OPP; return ARM_100_OPP; } } static inline int prcmu_set_ddr_opp(u8 opp) { return 0; } static inline int prcmu_get_ddr_opp(void) static inline int prcmu_get_ddr_opp(void) { { return DDR_100_OPP; return DDR_100_OPP; Loading