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Commit 4500cf60 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-intel-mid-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull Intel MID updates from Ingo Molnar:
 "This tree improves Intel MID (Mobile Internet Device) platform
  support:

   - Merrifield platform support (David Cohen)
   - Clovertrail platform support (Kuppuswamy Sathyanarayanan)
   - Various cleanups and fixes (David Cohen)"

* 'x86-intel-mid-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86, intel_mid: Replace memcpy with struct assignment
  x86, intel-mid: Return proper error code from get_gpio_by_name()
  x86, intel-mid: Check get_gpio_by_name() error code on platform code
  x86, intel-mid: sfi_handle_*_dev() should check for pdata error code
  x86, intel-mid: Remove deprecated X86_MDFLD and X86_WANT_INTEL_MID configs
  x86, intel-mid: Add Merrifield platform support
  x86, intel-mid: Add Clovertrail platform support
  x86, intel-mid: Move Medfield code out of intel-mid.c core file
parents 972d5e7e ee87c751
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+7 −23
Original line number Diff line number Diff line
@@ -439,42 +439,26 @@ config X86_INTEL_CE
	  This option compiles in support for the CE4100 SOC for settop
	  boxes and media devices.

config X86_WANT_INTEL_MID
config X86_INTEL_MID
	bool "Intel MID platform support"
	depends on X86_32
	depends on X86_EXTENDED_PLATFORM
	---help---
	  Select to build a kernel capable of supporting Intel MID platform
	  systems which do not have the PCI legacy interfaces (Moorestown,
	  Medfield). If you are building for a PC class system say N here.

if X86_WANT_INTEL_MID

config X86_INTEL_MID
	bool

config X86_MDFLD
       bool "Medfield MID platform"
	depends on PCI
	depends on PCI_GOANY
	depends on X86_IO_APIC
	select X86_INTEL_MID
	select SFI
	select I2C
	select DW_APB_TIMER
	select APB_TIMER
	select I2C
	select SPI
	select INTEL_SCU_IPC
	select X86_PLATFORM_DEVICES
	select MFD_INTEL_MSIC
	---help---
	  Medfield is Intel's Low Power Intel Architecture (LPIA) based Moblin
	  Internet Device(MID) platform. 
	  Unlike standard x86 PCs, Medfield does not have many legacy devices
	  nor standard legacy replacement devices/features. e.g. Medfield does
	  not contain i8259, i8254, HPET, legacy BIOS, most of the io ports.
	  Select to build a kernel capable of supporting Intel MID (Mobile
	  Internet Device) platform systems which do not have the PCI legacy
	  interfaces. If you are building for a PC class system say N here.

endif
	  Intel MID platforms are based on an Intel processor and chipset which
	  consume less power than most of the x86 derivatives.

config X86_INTEL_LPSS
	bool "Intel Low Power Subsystem Support"
+46 −2
Original line number Diff line number Diff line
@@ -51,10 +51,41 @@ struct devs_id {
enum intel_mid_cpu_type {
	/* 1 was Moorestown */
	INTEL_MID_CPU_CHIP_PENWELL = 2,
	INTEL_MID_CPU_CHIP_CLOVERVIEW,
	INTEL_MID_CPU_CHIP_TANGIER,
};

extern enum intel_mid_cpu_type __intel_mid_cpu_chip;

/**
 * struct intel_mid_ops - Interface between intel-mid & sub archs
 * @arch_setup: arch_setup function to re-initialize platform
 *             structures (x86_init, x86_platform_init)
 *
 * This structure can be extended if any new interface is required
 * between intel-mid & its sub arch files.
 */
struct intel_mid_ops {
	void (*arch_setup)(void);
};

/* Helper API's for INTEL_MID_OPS_INIT */
#define DECLARE_INTEL_MID_OPS_INIT(cpuname, cpuid)	\
				[cpuid] = get_##cpuname##_ops

/* Maximum number of CPU ops */
#define MAX_CPU_OPS(a) (sizeof(a)/sizeof(void *))

/*
 * For every new cpu addition, a weak get_<cpuname>_ops() function needs be
 * declared in arch/x86/platform/intel_mid/intel_mid_weak_decls.h.
 */
#define INTEL_MID_OPS_INIT {\
	DECLARE_INTEL_MID_OPS_INIT(penwell, INTEL_MID_CPU_CHIP_PENWELL), \
	DECLARE_INTEL_MID_OPS_INIT(cloverview, INTEL_MID_CPU_CHIP_CLOVERVIEW), \
	DECLARE_INTEL_MID_OPS_INIT(tangier, INTEL_MID_CPU_CHIP_TANGIER) \
};

#ifdef CONFIG_X86_INTEL_MID

static inline enum intel_mid_cpu_type intel_mid_identify_cpu(void)
@@ -86,8 +117,21 @@ extern enum intel_mid_timer_options intel_mid_timer_options;
 * Penwell uses spread spectrum clock, so the freq number is not exactly
 * the same as reported by MSR based on SDM.
 */
#define PENWELL_FSB_FREQ_83SKU         83200
#define PENWELL_FSB_FREQ_100SKU        99840
#define FSB_FREQ_83SKU	83200
#define FSB_FREQ_100SKU	99840
#define FSB_FREQ_133SKU	133000

#define FSB_FREQ_167SKU	167000
#define FSB_FREQ_200SKU	200000
#define FSB_FREQ_267SKU	267000
#define FSB_FREQ_333SKU	333000
#define FSB_FREQ_400SKU	400000

/* Bus Select SoC Fuse value */
#define BSEL_SOC_FUSE_MASK	0x7
#define BSEL_SOC_FUSE_001	0x1 /* FSB 133MHz */
#define BSEL_SOC_FUSE_101	0x5 /* FSB 100MHz */
#define BSEL_SOC_FUSE_111	0x7 /* FSB 83MHz */

#define SFI_MTMR_MAX_NUM 8
#define SFI_MRTC_MAX	8
+5 −1
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@
#include <asm/pci_x86.h>
#include <asm/hw_irq.h>
#include <asm/io_apic.h>
#include <asm/intel-mid.h>

#define PCIE_CAP_OFFSET	0x100

@@ -219,6 +220,9 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
	irq_attr.ioapic = mp_find_ioapic(dev->irq);
	irq_attr.ioapic_pin = dev->irq;
	irq_attr.trigger = 1; /* level */
	if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER)
		irq_attr.polarity = 0; /* active high */
	else
		irq_attr.polarity = 1; /* active low */
	io_apic_set_pci_routing(&dev->dev, dev->irq, &irq_attr);

+2 −2
Original line number Diff line number Diff line
obj-$(CONFIG_X86_INTEL_MID) += intel-mid.o
obj-$(CONFIG_X86_INTEL_MID) += intel_mid_vrtc.o
obj-$(CONFIG_X86_INTEL_MID) += intel-mid.o intel_mid_vrtc.o mfld.o mrfl.o
obj-$(CONFIG_EARLY_PRINTK_INTEL_MID) += early_printk_intel_mid.o

# SFI specific code
ifdef CONFIG_X86_INTEL_MID
obj-$(CONFIG_SFI) += sfi.o device_libs/
+3 −1
Original line number Diff line number Diff line
@@ -22,7 +22,9 @@ static void __init *emc1403_platform_data(void *info)
	int intr = get_gpio_by_name("thermal_int");
	int intr2nd = get_gpio_by_name("thermal_alert");

	if (intr == -1 || intr2nd == -1)
	if (intr < 0)
		return NULL;
	if (intr2nd < 0)
		return NULL;

	i2c_info->irq = intr + INTEL_MID_IRQ_OFFSET;
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