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Commit 41a1d04b authored by Jesse Brandeburg's avatar Jesse Brandeburg Committed by Jeff Kirsher
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i40e: use BIT and BIT_ULL macros



Use macros for abstracting (1 << foo) to BIT(foo)
and (1ULL << foo64) to BIT_ULL(foo64) in order to match
better with kernel requirements.

NOTE: the adminq_cmd.h file was not modified on purpose because
of the dependency upon firmware for that file.

Change-ID: I73ee2e48c880d671948aad19bd53ca6b2ac558fc
Signed-off-by: default avatarJesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: default avatarCatherine Sullivan <catherine.sullivan@intel.com>
Tested-by: default avatarJim Young <james.m.young@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent f1c7e72e
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+28 −28
Original line number Diff line number Diff line
@@ -98,7 +98,7 @@
#define I40E_INT_NAME_STR_LEN        (IFNAMSIZ + 9)

/* Ethtool Private Flags */
#define I40E_PRIV_FLAGS_NPAR_FLAG	(1 << 0)
#define I40E_PRIV_FLAGS_NPAR_FLAG	BIT(0)

#define I40E_NVM_VERSION_LO_SHIFT  0
#define I40E_NVM_VERSION_LO_MASK   (0xff << I40E_NVM_VERSION_LO_SHIFT)
@@ -289,35 +289,35 @@ struct i40e_pf {
	struct work_struct service_task;

	u64 flags;
#define I40E_FLAG_RX_CSUM_ENABLED              (u64)(1 << 1)
#define I40E_FLAG_MSI_ENABLED                  (u64)(1 << 2)
#define I40E_FLAG_MSIX_ENABLED                 (u64)(1 << 3)
#define I40E_FLAG_RX_1BUF_ENABLED              (u64)(1 << 4)
#define I40E_FLAG_RX_PS_ENABLED                (u64)(1 << 5)
#define I40E_FLAG_RSS_ENABLED                  (u64)(1 << 6)
#define I40E_FLAG_VMDQ_ENABLED                 (u64)(1 << 7)
#define I40E_FLAG_FDIR_REQUIRES_REINIT         (u64)(1 << 8)
#define I40E_FLAG_NEED_LINK_UPDATE             (u64)(1 << 9)
#define I40E_FLAG_RX_CSUM_ENABLED		BIT_ULL(1)
#define I40E_FLAG_MSI_ENABLED			BIT_ULL(2)
#define I40E_FLAG_MSIX_ENABLED			BIT_ULL(3)
#define I40E_FLAG_RX_1BUF_ENABLED		BIT_ULL(4)
#define I40E_FLAG_RX_PS_ENABLED			BIT_ULL(5)
#define I40E_FLAG_RSS_ENABLED			BIT_ULL(6)
#define I40E_FLAG_VMDQ_ENABLED			BIT_ULL(7)
#define I40E_FLAG_FDIR_REQUIRES_REINIT		BIT_ULL(8)
#define I40E_FLAG_NEED_LINK_UPDATE		BIT_ULL(9)
#ifdef I40E_FCOE
#define I40E_FLAG_FCOE_ENABLED                 (u64)(1 << 11)
#define I40E_FLAG_FCOE_ENABLED			BIT_ULL(11)
#endif /* I40E_FCOE */
#define I40E_FLAG_IN_NETPOLL                   (u64)(1 << 12)
#define I40E_FLAG_16BYTE_RX_DESC_ENABLED       (u64)(1 << 13)
#define I40E_FLAG_CLEAN_ADMINQ                 (u64)(1 << 14)
#define I40E_FLAG_FILTER_SYNC                  (u64)(1 << 15)
#define I40E_FLAG_PROCESS_MDD_EVENT            (u64)(1 << 17)
#define I40E_FLAG_PROCESS_VFLR_EVENT           (u64)(1 << 18)
#define I40E_FLAG_SRIOV_ENABLED                (u64)(1 << 19)
#define I40E_FLAG_DCB_ENABLED                  (u64)(1 << 20)
#define I40E_FLAG_FD_SB_ENABLED                (u64)(1 << 21)
#define I40E_FLAG_FD_ATR_ENABLED               (u64)(1 << 22)
#define I40E_FLAG_PTP                          (u64)(1 << 25)
#define I40E_FLAG_MFP_ENABLED                  (u64)(1 << 26)
#define I40E_FLAG_IN_NETPOLL			BIT_ULL(12)
#define I40E_FLAG_16BYTE_RX_DESC_ENABLED	BIT_ULL(13)
#define I40E_FLAG_CLEAN_ADMINQ			BIT_ULL(14)
#define I40E_FLAG_FILTER_SYNC			BIT_ULL(15)
#define I40E_FLAG_PROCESS_MDD_EVENT		BIT_ULL(17)
#define I40E_FLAG_PROCESS_VFLR_EVENT		BIT_ULL(18)
#define I40E_FLAG_SRIOV_ENABLED			BIT_ULL(19)
#define I40E_FLAG_DCB_ENABLED			BIT_ULL(20)
#define I40E_FLAG_FD_SB_ENABLED			BIT_ULL(21)
#define I40E_FLAG_FD_ATR_ENABLED		BIT_ULL(22)
#define I40E_FLAG_PTP				BIT_ULL(25)
#define I40E_FLAG_MFP_ENABLED			BIT_ULL(26)
#ifdef CONFIG_I40E_VXLAN
#define I40E_FLAG_VXLAN_FILTER_SYNC            (u64)(1 << 27)
#define I40E_FLAG_VXLAN_FILTER_SYNC		BIT_ULL(27)
#endif
#define I40E_FLAG_PORT_ID_VALID                (u64)(1 << 28)
#define I40E_FLAG_DCB_CAPABLE                  (u64)(1 << 29)
#define I40E_FLAG_PORT_ID_VALID			BIT_ULL(28)
#define I40E_FLAG_DCB_CAPABLE			BIT_ULL(29)
#define I40E_FLAG_VEB_MODE_ENABLED		BIT_ULL(40)

	/* tracks features that get auto disabled by errors */
@@ -443,8 +443,8 @@ struct i40e_vsi {

	u32 current_netdev_flags;
	unsigned long state;
#define I40E_VSI_FLAG_FILTER_CHANGED  (1<<0)
#define I40E_VSI_FLAG_VEB_OWNER       (1<<1)
#define I40E_VSI_FLAG_FILTER_CHANGED	BIT(0)
#define I40E_VSI_FLAG_VEB_OWNER		BIT(1)
	unsigned long flags;

	struct list_head mac_filter_list;
+2 −2
Original line number Diff line number Diff line
@@ -1393,9 +1393,9 @@ void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink)
			blink = false;

		if (blink)
			gpio_val |= (1 << I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);
			gpio_val |= BIT(I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);
		else
			gpio_val &= ~(1 << I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);
			gpio_val &= ~BIT(I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT);

		wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);
		break;
+4 −4
Original line number Diff line number Diff line
@@ -58,9 +58,9 @@
#define I40E_IEEE_ETS_MAXTC_SHIFT	0
#define I40E_IEEE_ETS_MAXTC_MASK	(0x7 << I40E_IEEE_ETS_MAXTC_SHIFT)
#define I40E_IEEE_ETS_CBS_SHIFT		6
#define I40E_IEEE_ETS_CBS_MASK		(0x1 << I40E_IEEE_ETS_CBS_SHIFT)
#define I40E_IEEE_ETS_CBS_MASK		BIT(I40E_IEEE_ETS_CBS_SHIFT)
#define I40E_IEEE_ETS_WILLING_SHIFT	7
#define I40E_IEEE_ETS_WILLING_MASK	(0x1 << I40E_IEEE_ETS_WILLING_SHIFT)
#define I40E_IEEE_ETS_WILLING_MASK	BIT(I40E_IEEE_ETS_WILLING_SHIFT)
#define I40E_IEEE_ETS_PRIO_0_SHIFT	0
#define I40E_IEEE_ETS_PRIO_0_MASK	(0x7 << I40E_IEEE_ETS_PRIO_0_SHIFT)
#define I40E_IEEE_ETS_PRIO_1_SHIFT	4
@@ -79,9 +79,9 @@
#define I40E_IEEE_PFC_CAP_SHIFT		0
#define I40E_IEEE_PFC_CAP_MASK		(0xF << I40E_IEEE_PFC_CAP_SHIFT)
#define I40E_IEEE_PFC_MBC_SHIFT		6
#define I40E_IEEE_PFC_MBC_MASK		(0x1 << I40E_IEEE_PFC_MBC_SHIFT)
#define I40E_IEEE_PFC_MBC_MASK		BIT(I40E_IEEE_PFC_MBC_SHIFT)
#define I40E_IEEE_PFC_WILLING_SHIFT	7
#define I40E_IEEE_PFC_WILLING_MASK	(0x1 << I40E_IEEE_PFC_WILLING_SHIFT)
#define I40E_IEEE_PFC_WILLING_MASK	BIT(I40E_IEEE_PFC_WILLING_SHIFT)

/* Defines for IEEE APP TLV */
#define I40E_IEEE_APP_SEL_SHIFT		0
+1 −1
Original line number Diff line number Diff line
@@ -187,7 +187,7 @@ void i40e_dcbnl_set_all(struct i40e_vsi *vsi)
	/* Set up all the App TLVs if DCBx is negotiated */
	for (i = 0; i < dcbxcfg->numapps; i++) {
		prio = dcbxcfg->app[i].priority;
		tc_map = (1 << dcbxcfg->etscfg.prioritytable[prio]);
		tc_map = BIT(dcbxcfg->etscfg.prioritytable[prio]);

		/* Add APP only if the TC is enabled for this VSI */
		if (tc_map & vsi->tc_config.enabled_tc) {
+5 −5
Original line number Diff line number Diff line
@@ -964,7 +964,7 @@ static void i40e_dbg_cmd_fd_ctrl(struct i40e_pf *pf, u64 flag, bool enable)
		pf->auto_disable_flags |= flag;
	}
	dev_info(&pf->pdev->dev, "requesting a PF reset\n");
	i40e_do_reset_safe(pf, (1 << __I40E_PF_RESET_REQUESTED));
	i40e_do_reset_safe(pf, BIT(__I40E_PF_RESET_REQUESTED));
}

#define I40E_MAX_DEBUG_OUT_BUFFER (4096*4)
@@ -1471,19 +1471,19 @@ static ssize_t i40e_dbg_command_write(struct file *filp,
		}
	} else if (strncmp(cmd_buf, "pfr", 3) == 0) {
		dev_info(&pf->pdev->dev, "debugfs: forcing PFR\n");
		i40e_do_reset_safe(pf, (1 << __I40E_PF_RESET_REQUESTED));
		i40e_do_reset_safe(pf, BIT(__I40E_PF_RESET_REQUESTED));

	} else if (strncmp(cmd_buf, "corer", 5) == 0) {
		dev_info(&pf->pdev->dev, "debugfs: forcing CoreR\n");
		i40e_do_reset_safe(pf, (1 << __I40E_CORE_RESET_REQUESTED));
		i40e_do_reset_safe(pf, BIT(__I40E_CORE_RESET_REQUESTED));

	} else if (strncmp(cmd_buf, "globr", 5) == 0) {
		dev_info(&pf->pdev->dev, "debugfs: forcing GlobR\n");
		i40e_do_reset_safe(pf, (1 << __I40E_GLOBAL_RESET_REQUESTED));
		i40e_do_reset_safe(pf, BIT(__I40E_GLOBAL_RESET_REQUESTED));

	} else if (strncmp(cmd_buf, "empr", 4) == 0) {
		dev_info(&pf->pdev->dev, "debugfs: forcing EMPR\n");
		i40e_do_reset_safe(pf, (1 << __I40E_EMP_RESET_REQUESTED));
		i40e_do_reset_safe(pf, BIT(__I40E_EMP_RESET_REQUESTED));

	} else if (strncmp(cmd_buf, "read", 4) == 0) {
		u32 address;
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