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Commit 404b2819 authored by Andrew-CT Chen's avatar Andrew-CT Chen Committed by Mauro Carvalho Chehab
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[media] arm64: dts: mediatek: Add node for Mediatek Video Processor Unit



Add VPU drivers for MT8173

Signed-off-by: default avatarAndrew-CT Chen <andrew-ct.chen@mediatek.com>
Signed-off-by: default avatarTiffany Lin <tiffany.lin@mediatek.com>
Signed-off-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@s-opensource.com>
parent 3003a180
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+23 −0
Original line number Original line Diff line number Diff line
@@ -168,6 +168,18 @@
		};
		};
	};
	};


	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
		vpu_dma_reserved: vpu_dma_mem_region {
			compatible = "shared-dma-pool";
			reg = <0 0xb7000000 0 0x500000>;
			alignment = <0x1000>;
			no-map;
		};
	};

	timer {
	timer {
		compatible = "arm,armv8-timer";
		compatible = "arm,armv8-timer";
		interrupt-parent = <&gic>;
		interrupt-parent = <&gic>;
@@ -312,6 +324,17 @@
			clock-names = "spi", "wrap";
			clock-names = "spi", "wrap";
		};
		};


		vpu: vpu@10020000 {
			compatible = "mediatek,mt8173-vpu";
			reg = <0 0x10020000 0 0x30000>,
			      <0 0x10050000 0 0x100>;
			reg-names = "tcm", "cfg_reg";
			interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&topckgen CLK_TOP_SCP_SEL>;
			clock-names = "main";
			memory-region = <&vpu_dma_reserved>;
		};

		sysirq: intpol-controller@10200620 {
		sysirq: intpol-controller@10200620 {
			compatible = "mediatek,mt8173-sysirq",
			compatible = "mediatek,mt8173-sysirq",
				     "mediatek,mt6577-sysirq";
				     "mediatek,mt6577-sysirq";