Commit 3cf29543 authored Apr 07, 2015 by Florian Fainelli Committed by Ralf Baechle Apr 08, 2015

MIPS: BCM63xx: Provide a plat_post_dma_flush hook

Broadcom BCM63xx DSL SoCs utilize BMIPS CPUs, and as such are required
to perform a read-ahead cache flush after a DMA transfer. Utilize
asm/bmips.h to provide a plat_post_dma_flush_hook, and
mach-generic/dma-coherence.h for everything else.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: jogo@openwrt.org
Patchwork: https://patchwork.linux-mips.org/patch/9726/

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

parent 68ba7cb0

arch/mips/include/asm/mach-bcm63xx/dma-coherence.h

0 → 100644

+10 −0

Original line number	Diff line number	Diff line
		#ifndef __ASM_MACH_BCM63XX_DMA_COHERENCE_H
		#define __ASM_MACH_BCM63XX_DMA_COHERENCE_H

		#include <asm/bmips.h>

		#define plat_post_dma_flush bmips_post_dma_flush

		#include <asm/mach-generic/dma-coherence.h>

		#endif /* __ASM_MACH_BCM63XX_DMA_COHERENCE_H */