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Commit 3c7c5dab authored by Santosh Shilimkar's avatar Santosh Shilimkar
Browse files

ARM: OMAP5: Enable arch timer support 



Enable Cortex A15 generic timer support for OMAP5 based SOCs.
The CPU local timers run on the free running real time counter clock.

Acked-by: default avatarBenoit Cousson <b-cousson@ti.com>
Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent fa6d79d2

arch/arm/boot/dts/omap5.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -33,9 +33,21 @@ 
	cpus {

		cpu@0 {

			compatible = "arm,cortex-a15";

			timer {

				compatible = "arm,armv7-timer";

				/* 14th PPI IRQ, active low level-sensitive */

				interrupts = <1 14 0x308>;

				clock-frequency = <6144000>;

			};

		};

		cpu@1 {

			compatible = "arm,cortex-a15";

			timer {

				compatible = "arm,armv7-timer";

				/* 14th PPI IRQ, active low level-sensitive */

				interrupts = <1 14 0x308>;

				clock-frequency = <6144000>;

			};

		};

	};

arch/arm/mach-omap2/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -74,6 +74,7 @@ config SOC_OMAP5 
	select HAVE_SMP

	select ARM_CPU_SUSPEND if PM

	select SOC_HAS_REALTIME_COUNTER

	select ARM_ARCH_TIMER



comment "OMAP Core Type"

	depends on ARCH_OMAP2

arch/arm/mach-omap2/timer.c

+7 −0
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@ 
#include <plat/dmtimer.h>

#include <asm/smp_twd.h>

#include <asm/sched_clock.h>

#include <asm/arch_timer.h>

#include "common.h"

#include <plat/omap_hwmod.h>

#include <plat/omap_device.h>
@@ -488,9 +489,15 @@ OMAP_SYS_TIMER(4) 
#ifdef CONFIG_SOC_OMAP5

static void __init omap5_timer_init(void)

{

	int err;



	omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);

	omap2_clocksource_init(2, OMAP4_MPU_SOURCE);

	realtime_counter_init();



	err = arch_timer_of_register();

	if (err)

		pr_err("%s: arch_timer_register failed %d\n", __func__, err);

}

OMAP_SYS_TIMER(5)

#endif