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Commit 356cb470 authored by Catalin Marinas's avatar Catalin Marinas Committed by Russell King
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[ARM] 4816/1: RealView: Move the platform-specific definitions into board-eb.h



This patch moves the platform specific definitions from platform.h into
the board-eb.h file. It drops the INT_* definitions as they are no
longer used in irqs.h (moved to board-eb.h). It renames REALVIEW_*
macros to REALVIEW_EB_* or REALVIEW_EB11MP_* to distinguish between
standard EB and EB + the ARM11MPCore tile. The platform.h file contains
common definitions to the RealView platforms and it is only directly
included in board-*.h files.

Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 93c2904d
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+2 −2
Original line number Diff line number Diff line
@@ -24,8 +24,8 @@
#include <asm/io.h>
#include <asm/irq.h>

#define TWD_BASE(cpu)	(__io_address(REALVIEW_TWD_BASE) + \
			 ((cpu) * REALVIEW_TWD_SIZE))
#define TWD_BASE(cpu)	(__io_address(REALVIEW_EB11MP_TWD_BASE) + \
			 ((cpu) * REALVIEW_EB11MP_TWD_SIZE))

static DEFINE_PER_CPU(struct clock_event_device, local_clockevent);

+2 −2
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ static unsigned int __init get_core_count(void)
{
	unsigned int ncores;

	ncores = __raw_readl(__io_address(REALVIEW_MPCORE_SCU_BASE) + SCU_CONFIG);
	ncores = __raw_readl(__io_address(REALVIEW_EB11MP_SCU_BASE) + SCU_CONFIG);

	return (ncores & 0x03) + 1;
}
@@ -52,7 +52,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
	 * core (e.g. timer irq), then they will not have been enabled
	 * for us: do so
	 */
	gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE));
	gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));

	/*
	 * let the primary processor know we're out of the
+1 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@
#include <asm/mach/map.h>
#include <asm/mach/mmc.h>

#include <asm/arch/board-eb.h>
#include <asm/arch/irqs.h>

#include "core.h"
+152 −0
Original line number Diff line number Diff line
/*
 * include/asm-arm/arch-realview/board-eb.h
 *
 * Copyright (C) 2007 ARM Limited
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */

#ifndef __ASM_ARCH_BOARD_EB_H
#define __ASM_ARCH_BOARD_EB_H

#include <asm/arch/platform.h>

/*
 * RealView EB + ARM11MPCore peripheral addresses
 */
#ifdef CONFIG_REALVIEW_MPCORE_REVB
#define REALVIEW_EB11MP_SCU_BASE	0x10100000	/* SCU registers */
#define REALVIEW_EB11MP_GIC_CPU_BASE	0x10100100	/* Generic interrupt controller CPU interface */
#define REALVIEW_EB11MP_TWD_BASE	0x10100700
#define REALVIEW_EB11MP_TWD_SIZE	0x00000100
#define REALVIEW_EB11MP_GIC_DIST_BASE	0x10101000	/* Generic interrupt controller distributor */
#define REALVIEW_EB11MP_L220_BASE	0x10102000	/* L220 registers */
#define REALVIEW_EB11MP_SYS_PLD_CTRL1	0xD8		/* Register offset for MPCore sysctl */
#else
#define REALVIEW_EB11MP_SCU_BASE	0x1F000000	/* SCU registers */
#define REALVIEW_EB11MP_GIC_CPU_BASE	0x1F000100	/* Generic interrupt controller CPU interface */
#define REALVIEW_EB11MP_TWD_BASE	0x1F000700
#define REALVIEW_EB11MP_TWD_SIZE	0x00000100
#define REALVIEW_EB11MP_GIC_DIST_BASE	0x1F001000	/* Generic interrupt controller distributor */
#define REALVIEW_EB11MP_L220_BASE	0x1F002000	/* L220 registers */
#define REALVIEW_EB11MP_SYS_PLD_CTRL1	0x74		/* Register offset for MPCore sysctl */
#endif

#define IRQ_EB_GIC_START	32

/*
 * RealView EB interrupt sources
 */
#define IRQ_EB_WDOG		(IRQ_EB_GIC_START + 0)		/* Watchdog timer */
#define IRQ_EB_SOFT		(IRQ_EB_GIC_START + 1)		/* Software interrupt */
#define IRQ_EB_COMMRx		(IRQ_EB_GIC_START + 2)		/* Debug Comm Rx interrupt */
#define IRQ_EB_COMMTx		(IRQ_EB_GIC_START + 3)		/* Debug Comm Tx interrupt */
#define IRQ_EB_TIMER0_1		(IRQ_EB_GIC_START + 4)		/* Timer 0 and 1 */
#define IRQ_EB_TIMER2_3		(IRQ_EB_GIC_START + 5)		/* Timer 2 and 3 */
#define IRQ_EB_GPIO0		(IRQ_EB_GIC_START + 6)		/* GPIO 0 */
#define IRQ_EB_GPIO1		(IRQ_EB_GIC_START + 7)		/* GPIO 1 */
#define IRQ_EB_GPIO2		(IRQ_EB_GIC_START + 8)		/* GPIO 2 */
								/* 9 reserved */
#define IRQ_EB_RTC		(IRQ_EB_GIC_START + 10)		/* Real Time Clock */
#define IRQ_EB_SSP		(IRQ_EB_GIC_START + 11)		/* Synchronous Serial Port */
#define IRQ_EB_UART0		(IRQ_EB_GIC_START + 12)		/* UART 0 on development chip */
#define IRQ_EB_UART1		(IRQ_EB_GIC_START + 13)		/* UART 1 on development chip */
#define IRQ_EB_UART2		(IRQ_EB_GIC_START + 14)		/* UART 2 on development chip */
#define IRQ_EB_UART3		(IRQ_EB_GIC_START + 15)		/* UART 3 on development chip */
#define IRQ_EB_SCI		(IRQ_EB_GIC_START + 16)		/* Smart Card Interface */
#define IRQ_EB_MMCI0A		(IRQ_EB_GIC_START + 17)		/* Multimedia Card 0A */
#define IRQ_EB_MMCI0B		(IRQ_EB_GIC_START + 18)		/* Multimedia Card 0B */
#define IRQ_EB_AACI		(IRQ_EB_GIC_START + 19)		/* Audio Codec */
#define IRQ_EB_KMI0		(IRQ_EB_GIC_START + 20)		/* Keyboard/Mouse port 0 */
#define IRQ_EB_KMI1		(IRQ_EB_GIC_START + 21)		/* Keyboard/Mouse port 1 */
#define IRQ_EB_CHARLCD		(IRQ_EB_GIC_START + 22)		/* Character LCD */
#define IRQ_EB_CLCD		(IRQ_EB_GIC_START + 23)		/* CLCD controller */
#define IRQ_EB_DMA		(IRQ_EB_GIC_START + 24)		/* DMA controller */
#define IRQ_EB_PWRFAIL		(IRQ_EB_GIC_START + 25)		/* Power failure */
#define IRQ_EB_PISMO		(IRQ_EB_GIC_START + 26)		/* PISMO interface */
#define IRQ_EB_DoC		(IRQ_EB_GIC_START + 27)		/* Disk on Chip memory controller */
#define IRQ_EB_ETH		(IRQ_EB_GIC_START + 28)		/* Ethernet controller */
#define IRQ_EB_USB		(IRQ_EB_GIC_START + 29)		/* USB controller */
#define IRQ_EB_TSPEN		(IRQ_EB_GIC_START + 30)		/* Touchscreen pen */
#define IRQ_EB_TSKPAD		(IRQ_EB_GIC_START + 31)		/* Touchscreen keypad */

/*
 * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
 */
#define IRQ_EB11MP_AACI		(IRQ_EB_GIC_START + 0)
#define IRQ_EB11MP_TIMER0_1	(IRQ_EB_GIC_START + 1)
#define IRQ_EB11MP_TIMER2_3	(IRQ_EB_GIC_START + 2)
#define IRQ_EB11MP_USB		(IRQ_EB_GIC_START + 3)
#define IRQ_EB11MP_UART0	(IRQ_EB_GIC_START + 4)
#define IRQ_EB11MP_UART1	(IRQ_EB_GIC_START + 5)
#define IRQ_EB11MP_RTC		(IRQ_EB_GIC_START + 6)
#define IRQ_EB11MP_KMI0		(IRQ_EB_GIC_START + 7)
#define IRQ_EB11MP_KMI1		(IRQ_EB_GIC_START + 8)
#define IRQ_EB11MP_ETH		(IRQ_EB_GIC_START + 9)
#define IRQ_EB11MP_EB_IRQ1	(IRQ_EB_GIC_START + 10)		/* main GIC */
#define IRQ_EB11MP_EB_IRQ2	(IRQ_EB_GIC_START + 11)		/* tile GIC */
#define IRQ_EB11MP_EB_FIQ1	(IRQ_EB_GIC_START + 12)		/* main GIC */
#define IRQ_EB11MP_EB_FIQ2	(IRQ_EB_GIC_START + 13)		/* tile GIC */
#define IRQ_EB11MP_MMCI0A	(IRQ_EB_GIC_START + 14)
#define IRQ_EB11MP_MMCI0B	(IRQ_EB_GIC_START + 15)

#define IRQ_EB11MP_PMU_CPU0	(IRQ_EB_GIC_START + 17)
#define IRQ_EB11MP_PMU_CPU1	(IRQ_EB_GIC_START + 18)
#define IRQ_EB11MP_PMU_CPU2	(IRQ_EB_GIC_START + 19)
#define IRQ_EB11MP_PMU_CPU3	(IRQ_EB_GIC_START + 20)
#define IRQ_EB11MP_PMU_SCU0	(IRQ_EB_GIC_START + 21)
#define IRQ_EB11MP_PMU_SCU1	(IRQ_EB_GIC_START + 22)
#define IRQ_EB11MP_PMU_SCU2	(IRQ_EB_GIC_START + 23)
#define IRQ_EB11MP_PMU_SCU3	(IRQ_EB_GIC_START + 24)
#define IRQ_EB11MP_PMU_SCU4	(IRQ_EB_GIC_START + 25)
#define IRQ_EB11MP_PMU_SCU5	(IRQ_EB_GIC_START + 26)
#define IRQ_EB11MP_PMU_SCU6	(IRQ_EB_GIC_START + 27)
#define IRQ_EB11MP_PMU_SCU7	(IRQ_EB_GIC_START + 28)

#define IRQ_EB11MP_L220_EVENT	(IRQ_EB_GIC_START + 29)
#define IRQ_EB11MP_L220_SLAVE	(IRQ_EB_GIC_START + 30)
#define IRQ_EB11MP_L220_DECODE	(IRQ_EB_GIC_START + 31)

#define IRQ_EB11MP_UART2	-1
#define IRQ_EB11MP_UART3	-1
#define IRQ_EB11MP_CLCD		-1
#define IRQ_EB11MP_DMA		-1
#define IRQ_EB11MP_WDOG		-1
#define IRQ_EB11MP_GPIO0	-1
#define IRQ_EB11MP_GPIO1	-1
#define IRQ_EB11MP_GPIO2	-1
#define IRQ_EB11MP_SCI		-1
#define IRQ_EB11MP_SSP		-1

#define NR_GIC_EB11MP		2

/*
 * Only define NR_IRQS if less than NR_IRQS_EB
 */
#define NR_IRQS_EB		(IRQ_EB_GIC_START + 96)

#if defined(CONFIG_MACH_REALVIEW_EB) \
	&& (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
#undef NR_IRQS
#define NR_IRQS			NR_IRQS_EB
#endif

#if defined(CONFIG_REALVIEW_MPCORE) \
	&& (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
#undef MAX_GIC_NR
#define MAX_GIC_NR		NR_GIC_EB11MP
#endif

#endif	/* __ASM_ARCH_BOARD_EB_H */
+5 −0
Original line number Diff line number Diff line
@@ -9,12 +9,17 @@
 */
#include <asm/hardware.h>
#include <asm/hardware/gic.h>
#include <asm/arch/board-eb.h>

		.macro	disable_fiq
		.endm

		.macro  get_irqnr_preamble, base, tmp
#ifdef CONFIG_REALVIEW_MPCORE
		ldr     \base, =IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE)
#else
		ldr     \base, =IO_ADDRESS(REALVIEW_GIC_CPU_BASE)
#endif
		.endm

		.macro  arch_ret_to_user, tmp1, tmp2
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