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Commit 33983675 authored by Brian Norris's avatar Brian Norris
Browse files

Merge tag 'nand/fixes-for-4.13-rc4' of git://git.infradead.org/l2-mtd into MTD 

"""
This PR contains both core and drivers fixes for 4.13.

Core fixes:
- Fix data interface setup for ONFI NANDs that do not support the SET
  FEATURES command
- Fix a kernel doc header
- Fix potential integer overflow when retrieving timing information
  from the parameter page
- Fix wrong OOB layout for small page NANDs

Driver fixes:
- Fix potential division-by-zero bug
- Fix backward compat with old atmel-nand DT bindings
- Fix ->setup_data_interface() in the atmel NAND driver
"""
parents 5771a8c0 ee02f73e

drivers/mtd/nand/atmel/nand-controller.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -1201,7 +1201,7 @@ static int atmel_smc_nand_prepare_smcconf(struct atmel_nand *nand, 
	 * tRC < 30ns implies EDO mode. This controller does not support this

	 * tRC < 30ns implies EDO mode. This controller does not support this

	 * mode.

	 * mode.

	 */

	 */

	if (conf->timings.sdr.tRC_min < 30)

	if (conf->timings.sdr.tRC_min < 30000)

		return -ENOTSUPP;

		return -ENOTSUPP;





	atmel_smc_cs_conf_init(smcconf);

	atmel_smc_cs_conf_init(smcconf);

drivers/mtd/nand/atmel/pmecc.c

+6 −15
Original line number Original line Diff line number Diff line
@@ -945,6 +945,7 @@ struct atmel_pmecc *devm_atmel_pmecc_get(struct device *userdev) 
		 */

		 */

		struct platform_device *pdev = to_platform_device(userdev);

		struct platform_device *pdev = to_platform_device(userdev);

		const struct atmel_pmecc_caps *caps;

		const struct atmel_pmecc_caps *caps;

		const struct of_device_id *match;





		/* No PMECC engine available. */

		/* No PMECC engine available. */

		if (!of_property_read_bool(userdev->of_node,

		if (!of_property_read_bool(userdev->of_node,
@@ -953,22 +954,12 @@ struct atmel_pmecc *devm_atmel_pmecc_get(struct device *userdev) 




		caps = &at91sam9g45_caps;

		caps = &at91sam9g45_caps;





		/*

		/* Find the caps associated to the NAND dev node. */

		 * Try to find the NFC subnode and extract the associated caps

		match = of_match_node(atmel_pmecc_legacy_match,

		 * from there.

				      userdev->of_node);

		 */

		np = of_find_compatible_node(userdev->of_node, NULL,

					     "atmel,sama5d3-nfc");

		if (np) {

			const struct of_device_id *match;



			match = of_match_node(atmel_pmecc_legacy_match, np);

		if (match && match->data)

		if (match && match->data)

			caps = match->data;

			caps = match->data;





			of_node_put(np);

		}



		pmecc = atmel_pmecc_create(pdev, caps, 1, 2);

		pmecc = atmel_pmecc_create(pdev, caps, 1, 2);

	}

	}

drivers/mtd/nand/nand_base.c

+10 −3
Original line number Original line Diff line number Diff line
@@ -65,8 +65,14 @@ static int nand_ooblayout_ecc_sp(struct mtd_info *mtd, int section, 




	if (!section) {

	if (!section) {

		oobregion->offset = 0;

		oobregion->offset = 0;

		if (mtd->oobsize == 16)

			oobregion->length = 4;

			oobregion->length = 4;

		else

			oobregion->length = 3;

	} else {

	} else {

		if (mtd->oobsize == 8)

			return -ERANGE;



		oobregion->offset = 6;

		oobregion->offset = 6;

		oobregion->length = ecc->total - 4;

		oobregion->length = ecc->total - 4;

	}

	}
@@ -1125,7 +1131,9 @@ static int nand_setup_data_interface(struct nand_chip *chip, int chipnr) 
	 * Ensure the timing mode has been changed on the chip side

	 * Ensure the timing mode has been changed on the chip side

	 * before changing timings on the controller side.

	 * before changing timings on the controller side.

	 */

	 */

	if (chip->onfi_version) {

	if (chip->onfi_version &&

	    (le16_to_cpu(chip->onfi_params.opt_cmd) &

	     ONFI_OPT_CMD_SET_GET_FEATURES)) {

		u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = {

		u8 tmode_param[ONFI_SUBFEATURE_PARAM_LEN] = {

			chip->onfi_timing_mode_default,

			chip->onfi_timing_mode_default,

		};

		};
@@ -2741,7 +2749,6 @@ static int nand_write_page_syndrome(struct mtd_info *mtd, 
 * @buf: the data to write

 * @buf: the data to write

 * @oob_required: must write chip->oob_poi to OOB

 * @oob_required: must write chip->oob_poi to OOB

 * @page: page number to write

 * @page: page number to write

 * @cached: cached programming

 * @raw: use _raw version of write_page

 * @raw: use _raw version of write_page

 */

 */

static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,

static int nand_write_page(struct mtd_info *mtd, struct nand_chip *chip,

drivers/mtd/nand/nand_timings.c

+3 −3
Original line number Original line Diff line number Diff line
@@ -311,9 +311,9 @@ int onfi_init_data_interface(struct nand_chip *chip, 
		struct nand_sdr_timings *timings = &iface->timings.sdr;

		struct nand_sdr_timings *timings = &iface->timings.sdr;





		/* microseconds -> picoseconds */

		/* microseconds -> picoseconds */

		timings->tPROG_max = 1000000UL * le16_to_cpu(params->t_prog);

		timings->tPROG_max = 1000000ULL * le16_to_cpu(params->t_prog);

		timings->tBERS_max = 1000000UL * le16_to_cpu(params->t_bers);

		timings->tBERS_max = 1000000ULL * le16_to_cpu(params->t_bers);

		timings->tR_max = 1000000UL * le16_to_cpu(params->t_r);

		timings->tR_max = 1000000ULL * le16_to_cpu(params->t_r);





		/* nanoseconds -> picoseconds */

		/* nanoseconds -> picoseconds */

		timings->tCCS_min = 1000UL * le16_to_cpu(params->t_ccs);

		timings->tCCS_min = 1000UL * le16_to_cpu(params->t_ccs);

drivers/mtd/nand/sunxi_nand.c

+4 −0
Original line number Original line Diff line number Diff line
@@ -1728,6 +1728,10 @@ static int sunxi_nfc_setup_data_interface(struct mtd_info *mtd, int csline, 
	 */

	 */

	chip->clk_rate = NSEC_PER_SEC / min_clk_period;

	chip->clk_rate = NSEC_PER_SEC / min_clk_period;

	real_clk_rate = clk_round_rate(nfc->mod_clk, chip->clk_rate);

	real_clk_rate = clk_round_rate(nfc->mod_clk, chip->clk_rate);

	if (real_clk_rate <= 0) {

		dev_err(nfc->dev, "Unable to round clk %lu\n", chip->clk_rate);

		return -EINVAL;

	}





	/*

	/*

	 * ONFI specification 3.1, paragraph 4.15.2 dictates that EDO data

	 * ONFI specification 3.1, paragraph 4.15.2 dictates that EDO data