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Commit 2fae5e36 authored by Michael Chan's avatar Michael Chan Committed by David S. Miller
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tg3: Fix poor tx performance on 57766 after MTU change 



GRC reset causes the read DMA engine to go into a mode that breaks up
requests into 256 bytes.  A PHY reset is required to bring it back to
the normal mode.

Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 6541b806

drivers/net/ethernet/broadcom/tg3.c

+8 −2
Original line number Diff line number Diff line
@@ -12267,7 +12267,7 @@ static inline void tg3_set_mtu(struct net_device *dev, struct tg3 *tp, 
static int tg3_change_mtu(struct net_device *dev, int new_mtu)

{

	struct tg3 *tp = netdev_priv(dev);

	int err;

	int err, reset_phy = 0;



	if (new_mtu < TG3_MIN_MTU || new_mtu > TG3_MAX_MTU(tp))

		return -EINVAL;
@@ -12290,7 +12290,13 @@ static int tg3_change_mtu(struct net_device *dev, int new_mtu) 


	tg3_set_mtu(dev, tp, new_mtu);



	err = tg3_restart_hw(tp, 0);

	/* Reset PHY, otherwise the read DMA engine will be in a mode that

	 * breaks all requests to 256 bytes.

	 */

	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57766)

		reset_phy = 1;



	err = tg3_restart_hw(tp, reset_phy);



	if (!err)

		tg3_netif_start(tp);