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Commit 2d299834 authored by Sebastian Hesselbarth's avatar Sebastian Hesselbarth Committed by Jason Cooper
Browse files

ARM: dove: add cpu device tree node 



This adds a node for the Marvell Sheeva PJ4A CPU found on Dove SoCs.
While at it, also move the l2-cache node out of internal registers and
consistently name different nodes.

Signed-off-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>

Conflicts:
	arch/arm/boot/dts/dove.dtsi
parent f4ada24b

arch/arm/boot/dts/dove.dtsi

+214 −19
Original line number Original line Diff line number Diff line
@@ -10,6 +10,23 @@ 
		gpio2 = &gpio2;

		gpio2 = &gpio2;

	};

	};





	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		cpu0: cpu@0 {

			compatible = "marvell,pj4a", "marvell,sheeva-v7";

			device_type = "cpu";

			next-level-cache = <&l2>;

			reg = <0>;

		};

	};



	l2: l2-cache {

		compatible = "marvell,tauros2-cache";

		marvell,tauros2-cache-features = <0>;

	};



	soc@f1000000 {

	soc@f1000000 {

		compatible = "simple-bus";

		compatible = "simple-bus";

		#address-cells = <1>;

		#address-cells = <1>;
@@ -25,11 +42,6 @@ 
		          0xf2100000 0xf2100000 0x0100000   /* PCIe0 I/O   1M */

		          0xf2100000 0xf2100000 0x0100000   /* PCIe0 I/O   1M */

		          0xf8000000 0xf8000000 0x8000000>; /* BootROM   128M */

		          0xf8000000 0xf8000000 0x8000000>; /* BootROM   128M */





		l2: l2-cache {

			compatible = "marvell,tauros2-cache";

			marvell,tauros2-cache-features = <0>;

		};



		timer: timer@20300 {

		timer: timer@20300 {

			compatible = "marvell,orion-timer";

			compatible = "marvell,orion-timer";

			reg = <0x20300 0x20>;

			reg = <0x20300 0x20>;
@@ -60,14 +72,14 @@ 
			#clock-cells = <1>;

			#clock-cells = <1>;

		};

		};





		gate_clk: clock-gating-control@d0038 {

		gate_clk: clock-gating-ctrl@d0038 {

			compatible = "marvell,dove-gating-clock";

			compatible = "marvell,dove-gating-clock";

			reg = <0xd0038 0x4>;

			reg = <0xd0038 0x4>;

			clocks = <&core_clk 0>;

			clocks = <&core_clk 0>;

			#clock-cells = <1>;

			#clock-cells = <1>;

		};

		};





		thermal: thermal@d001c {

		thermal: thermal-diode@d001c {

			compatible = "marvell,dove-thermal";

			compatible = "marvell,dove-thermal";

			reg = <0xd001c 0x0c>, <0xd005c 0x08>;

			reg = <0xd001c 0x0c>, <0xd005c 0x08>;

		};

		};
@@ -87,6 +99,8 @@ 
			reg-shift = <2>;

			reg-shift = <2>;

			interrupts = <8>;

			interrupts = <8>;

			clocks = <&core_clk 0>;

			clocks = <&core_clk 0>;

			pinctrl-0 = <&pmx_uart1>;

			pinctrl-names = "default";

			status = "disabled";

			status = "disabled";

		};

		};
@@ -108,7 +122,7 @@ 
			status = "disabled";

			status = "disabled";

		};

		};





		gpio0: gpio@d0400 {

		gpio0: gpio-ctrl@d0400 {

			compatible = "marvell,orion-gpio";

			compatible = "marvell,orion-gpio";

			#gpio-cells = <2>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-controller;
@@ -119,7 +133,7 @@ 
			interrupts = <12>, <13>, <14>, <60>;

			interrupts = <12>, <13>, <14>, <60>;

		};

		};





		gpio1: gpio@d0420 {

		gpio1: gpio-ctrl@d0420 {

			compatible = "marvell,orion-gpio";

			compatible = "marvell,orion-gpio";

			#gpio-cells = <2>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-controller;
@@ -130,7 +144,7 @@ 
			interrupts = <61>;

			interrupts = <61>;

		};

		};





		gpio2: gpio@e8400 {

		gpio2: gpio-ctrl@e8400 {

			compatible = "marvell,orion-gpio";

			compatible = "marvell,orion-gpio";

			#gpio-cells = <2>;

			#gpio-cells = <2>;

			gpio-controller;

			gpio-controller;
@@ -138,13 +152,188 @@ 
			ngpios = <8>;

			ngpios = <8>;

		};

		};





		pinctrl: pinctrl@d0200 {

		pinctrl: pin-ctrl@d0200 {

			compatible = "marvell,dove-pinctrl";

			compatible = "marvell,dove-pinctrl";

			reg = <0xd0200 0x10>;

			reg = <0xd0200 0x10>;

			clocks = <&gate_clk 22>;

			clocks = <&gate_clk 22>;



			pmx_gpio_0: pmx-gpio-0 {

				marvell,pins = "mpp0";

				marvell,function = "gpio";

			};



			pmx_gpio_1: pmx-gpio-1 {

				marvell,pins = "mpp1";

				marvell,function = "gpio";

			};



			pmx_gpio_2: pmx-gpio-2 {

				marvell,pins = "mpp2";

				marvell,function = "gpio";

			};



			pmx_gpio_3: pmx-gpio-3 {

				marvell,pins = "mpp3";

				marvell,function = "gpio";

			};



			pmx_gpio_4: pmx-gpio-4 {

				marvell,pins = "mpp4";

				marvell,function = "gpio";

			};



			pmx_gpio_5: pmx-gpio-5 {

				marvell,pins = "mpp5";

				marvell,function = "gpio";

			};



			pmx_gpio_6: pmx-gpio-6 {

				marvell,pins = "mpp6";

				marvell,function = "gpio";

			};



			pmx_gpio_7: pmx-gpio-7 {

				marvell,pins = "mpp7";

				marvell,function = "gpio";

			};



			pmx_gpio_8: pmx-gpio-8 {

				marvell,pins = "mpp8";

				marvell,function = "gpio";

			};



			pmx_gpio_9: pmx-gpio-9 {

				marvell,pins = "mpp9";

				marvell,function = "gpio";

			};



			pmx_gpio_10: pmx-gpio-10 {

				marvell,pins = "mpp10";

				marvell,function = "gpio";

			};



			pmx_gpio_11: pmx-gpio-11 {

				marvell,pins = "mpp11";

				marvell,function = "gpio";

			};



			pmx_gpio_12: pmx-gpio-12 {

				marvell,pins = "mpp12";

				marvell,function = "gpio";

			};



			pmx_gpio_13: pmx-gpio-13 {

				marvell,pins = "mpp13";

				marvell,function = "gpio";

			};



			pmx_gpio_14: pmx-gpio-14 {

				marvell,pins = "mpp14";

				marvell,function = "gpio";

			};



			pmx_gpio_15: pmx-gpio-15 {

				marvell,pins = "mpp15";

				marvell,function = "gpio";

			};



			pmx_gpio_16: pmx-gpio-16 {

				marvell,pins = "mpp16";

				marvell,function = "gpio";

			};



			pmx_gpio_17: pmx-gpio-17 {

				marvell,pins = "mpp17";

				marvell,function = "gpio";

			};



			pmx_gpio_18: pmx-gpio-18 {

				marvell,pins = "mpp18";

				marvell,function = "gpio";

			};



			pmx_gpio_19: pmx-gpio-19 {

				marvell,pins = "mpp19";

				marvell,function = "gpio";

			};



			pmx_gpio_20: pmx-gpio-20 {

				marvell,pins = "mpp20";

				marvell,function = "gpio";

			};



			pmx_gpio_21: pmx-gpio-21 {

				marvell,pins = "mpp21";

				marvell,function = "gpio";

			};



			pmx_camera: pmx-camera {

				marvell,pins = "mpp_camera";

				marvell,function = "camera";

			};



			pmx_camera_gpio: pmx-camera-gpio {

				marvell,pins = "mpp_camera";

				marvell,function = "gpio";

			};



			pmx_sdio0: pmx-sdio0 {

				marvell,pins = "mpp_sdio0";

				marvell,function = "sdio0";

			};



			pmx_sdio0_gpio: pmx-sdio0-gpio {

				marvell,pins = "mpp_sdio0";

				marvell,function = "gpio";

			};



			pmx_sdio1: pmx-sdio1 {

				marvell,pins = "mpp_sdio1";

				marvell,function = "sdio1";

			};



			pmx_sdio1_gpio: pmx-sdio1-gpio {

				marvell,pins = "mpp_sdio1";

				marvell,function = "gpio";

			};



			pmx_audio1_gpio: pmx-audio1-gpio {

				marvell,pins = "mpp_audio1";

				marvell,function = "gpio";

			};



			pmx_spi0: pmx-spi0 {

				marvell,pins = "mpp_spi0";

				marvell,function = "spi0";

			};



			pmx_spi0_gpio: pmx-spi0-gpio {

				marvell,pins = "mpp_spi0";

				marvell,function = "gpio";

			};



			pmx_uart1: pmx-uart1 {

				marvell,pins = "mpp_uart1";

				marvell,function = "uart1";

			};



			pmx_uart1_gpio: pmx-uart1-gpio {

				marvell,pins = "mpp_uart1";

				marvell,function = "gpio";

			};



			pmx_nand: pmx-nand {

				marvell,pins = "mpp_nand";

				marvell,function = "nand";

			};



			pmx_nand_gpo: pmx-nand-gpo {

				marvell,pins = "mpp_nand";

				marvell,function = "gpo";

			};

		};

		};





		spi0: spi@10600 {

		spi0: spi-ctrl@10600 {

			compatible = "marvell,orion-spi";

			compatible = "marvell,orion-spi";

			#address-cells = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

			#size-cells = <0>;
@@ -152,10 +341,12 @@ 
			interrupts = <6>;

			interrupts = <6>;

			reg = <0x10600 0x28>;

			reg = <0x10600 0x28>;

			clocks = <&core_clk 0>;

			clocks = <&core_clk 0>;

			pinctrl-0 = <&pmx_spi0>;

			pinctrl-names = "default";

			status = "disabled";

			status = "disabled";

		};

		};





		spi1: spi@14600 {

		spi1: spi-ctrl@14600 {

			compatible = "marvell,orion-spi";

			compatible = "marvell,orion-spi";

			#address-cells = <1>;

			#address-cells = <1>;

			#size-cells = <0>;

			#size-cells = <0>;
@@ -166,7 +357,7 @@ 
			status = "disabled";

			status = "disabled";

		};

		};





		i2c0: i2c@11000 {

		i2c0: i2c-ctrl@11000 {

			compatible = "marvell,mv64xxx-i2c";

			compatible = "marvell,mv64xxx-i2c";

			reg = <0x11000 0x20>;

			reg = <0x11000 0x20>;

			#address-cells = <1>;

			#address-cells = <1>;
@@ -194,23 +385,27 @@ 
			status = "okay";

			status = "okay";

		};

		};





		sdio0: sdio@92000 {

		sdio0: sdio-host@92000 {

			compatible = "marvell,dove-sdhci";

			compatible = "marvell,dove-sdhci";

			reg = <0x92000 0x100>;

			reg = <0x92000 0x100>;

			interrupts = <35>, <37>;

			interrupts = <35>, <37>;

			clocks = <&gate_clk 8>;

			clocks = <&gate_clk 8>;

			pinctrl-0 = <&pmx_sdio0>;

			pinctrl-names = "default";

			status = "disabled";

			status = "disabled";

		};

		};





		sdio1: sdio@90000 {

		sdio1: sdio-host@90000 {

			compatible = "marvell,dove-sdhci";

			compatible = "marvell,dove-sdhci";

			reg = <0x90000 0x100>;

			reg = <0x90000 0x100>;

			interrupts = <36>, <38>;

			interrupts = <36>, <38>;

			clocks = <&gate_clk 9>;

			clocks = <&gate_clk 9>;

			pinctrl-0 = <&pmx_sdio1>;

			pinctrl-names = "default";

			status = "disabled";

			status = "disabled";

		};

		};





		sata0: sata@a0000 {

		sata0: sata-host@a0000 {

			compatible = "marvell,orion-sata";

			compatible = "marvell,orion-sata";

			reg = <0xa0000 0x2400>;

			reg = <0xa0000 0x2400>;

			interrupts = <62>;

			interrupts = <62>;
@@ -219,12 +414,12 @@ 
			status = "disabled";

			status = "disabled";

		};

		};





		rtc@d8500 {

		rtc: real-time-clock@d8500 {

			compatible = "marvell,orion-rtc";

			compatible = "marvell,orion-rtc";

			reg = <0xd8500 0x20>;

			reg = <0xd8500 0x20>;

		};

		};





		crypto: crypto@30000 {

		crypto: crypto-engine@30000 {

			compatible = "marvell,orion-crypto";

			compatible = "marvell,orion-crypto";

			reg = <0x30000 0x10000>,

			reg = <0x30000 0x10000>,

			      <0xc8000000 0x800>;

			      <0xc8000000 0x800>;