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Commit 281a58c8 authored by Gilad Ben-Yossef's avatar Gilad Ben-Yossef Committed by Herbert Xu
Browse files

crypto: ccree - correct host regs offset 



The product signature and HW revision register have different offset on the
older HW revisions.
This fixes the problem of the driver failing sanity check on silicon
despite working on the FPGA emulation systems.

Fixes: 27b3b22d ("crypto: ccree - add support for older HW revs")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarGilad Ben-Yossef <gilad@benyossef.com>
Reviewed-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 4262c98a

drivers/crypto/ccree/cc_debugfs.c

+5 −2
Original line number Diff line number Diff line
@@ -26,7 +26,8 @@ struct cc_debugfs_ctx { 
static struct dentry *cc_debugfs_dir;



static struct debugfs_reg32 debug_regs[] = {

	CC_DEBUG_REG(HOST_SIGNATURE),

	{ .name = "SIGNATURE" }, /* Must be 0th */

	{ .name = "VERSION" }, /* Must be 1st */

	CC_DEBUG_REG(HOST_IRR),

	CC_DEBUG_REG(HOST_POWER_DOWN_EN),

	CC_DEBUG_REG(AXIM_MON_ERR),
@@ -34,7 +35,6 @@ static struct debugfs_reg32 debug_regs[] = { 
	CC_DEBUG_REG(HOST_IMR),

	CC_DEBUG_REG(AXIM_CFG),

	CC_DEBUG_REG(AXIM_CACHE_PARAMS),

	CC_DEBUG_REG(HOST_VERSION),

	CC_DEBUG_REG(GPR_HOST),

	CC_DEBUG_REG(AXIM_MON_COMP),

};
@@ -58,6 +58,9 @@ int cc_debugfs_init(struct cc_drvdata *drvdata) 
	struct debugfs_regset32 *regset;

	struct dentry *file;



	debug_regs[0].offset = drvdata->sig_offset;

	debug_regs[1].offset = drvdata->ver_offset;



	ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);

	if (!ctx)

		return -ENOMEM;

drivers/crypto/ccree/cc_driver.c

+6 −2
Original line number Diff line number Diff line
@@ -207,9 +207,13 @@ static int init_cc_resources(struct platform_device *plat_dev) 
	if (hw_rev->rev >= CC_HW_REV_712) {

		new_drvdata->hash_len_sz = HASH_LEN_SIZE_712;

		new_drvdata->axim_mon_offset = CC_REG(AXIM_MON_COMP);

		new_drvdata->sig_offset = CC_REG(HOST_SIGNATURE_712);

		new_drvdata->ver_offset = CC_REG(HOST_VERSION_712);

	} else {

		new_drvdata->hash_len_sz = HASH_LEN_SIZE_630;

		new_drvdata->axim_mon_offset = CC_REG(AXIM_MON_COMP8);

		new_drvdata->sig_offset = CC_REG(HOST_SIGNATURE_630);

		new_drvdata->ver_offset = CC_REG(HOST_VERSION_630);

	}



	platform_set_drvdata(plat_dev, new_drvdata);
@@ -276,7 +280,7 @@ static int init_cc_resources(struct platform_device *plat_dev) 
	}



	/* Verify correct mapping */

	signature_val = cc_ioread(new_drvdata, CC_REG(HOST_SIGNATURE));

	signature_val = cc_ioread(new_drvdata, new_drvdata->sig_offset);

	if (signature_val != hw_rev->sig) {

		dev_err(dev, "Invalid CC signature: SIGNATURE=0x%08X != expected=0x%08X\n",

			signature_val, hw_rev->sig);
@@ -287,7 +291,7 @@ static int init_cc_resources(struct platform_device *plat_dev) 


	/* Display HW versions */

	dev_info(dev, "ARM CryptoCell %s Driver: HW version 0x%08X, Driver version %s\n",

		 hw_rev->name, cc_ioread(new_drvdata, CC_REG(HOST_VERSION)),

		 hw_rev->name, cc_ioread(new_drvdata, new_drvdata->ver_offset),

		 DRV_MODULE_VERSION);



	rc = init_cc_regs(new_drvdata, true);

drivers/crypto/ccree/cc_driver.h

+2 −0
Original line number Diff line number Diff line
@@ -129,6 +129,8 @@ struct cc_drvdata { 
	enum cc_hw_rev hw_rev;

	u32 hash_len_sz;

	u32 axim_mon_offset;

	u32 sig_offset;

	u32 ver_offset;

};



struct cc_crypto_alg {

drivers/crypto/ccree/cc_host_regs.h

+4 −2
Original line number Diff line number Diff line
@@ -45,7 +45,8 @@ 
#define CC_HOST_ICR_DSCRPTR_WATERMARK_QUEUE0_CLEAR_BIT_SIZE	0x1UL

#define CC_HOST_ICR_AXIM_COMP_INT_CLEAR_BIT_SHIFT	0x17UL

#define CC_HOST_ICR_AXIM_COMP_INT_CLEAR_BIT_SIZE	0x1UL

#define CC_HOST_SIGNATURE_REG_OFFSET	0xA24UL

#define CC_HOST_SIGNATURE_712_REG_OFFSET	0xA24UL

#define CC_HOST_SIGNATURE_630_REG_OFFSET	0xAC8UL

#define CC_HOST_SIGNATURE_VALUE_BIT_SHIFT	0x0UL

#define CC_HOST_SIGNATURE_VALUE_BIT_SIZE	0x20UL

#define CC_HOST_BOOT_REG_OFFSET	0xA28UL
@@ -105,7 +106,8 @@ 
#define CC_HOST_BOOT_ONLY_ENCRYPT_LOCAL_BIT_SIZE	0x1UL

#define CC_HOST_BOOT_AES_EXISTS_LOCAL_BIT_SHIFT	0x1EUL

#define CC_HOST_BOOT_AES_EXISTS_LOCAL_BIT_SIZE	0x1UL

#define CC_HOST_VERSION_REG_OFFSET	0xA40UL

#define CC_HOST_VERSION_712_REG_OFFSET	0xA40UL

#define CC_HOST_VERSION_630_REG_OFFSET	0xAD8UL

#define CC_HOST_VERSION_VALUE_BIT_SHIFT	0x0UL

#define CC_HOST_VERSION_VALUE_BIT_SIZE	0x20UL

#define CC_HOST_KFDE0_VALID_REG_OFFSET	0xA60UL