Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 269ed8ee authored by Andrzej Hajda's avatar Andrzej Hajda Committed by Archit Taneja
Browse files

drm/bridge/sii8620: send EMSC features on request 



Device should report to the peer which features are really supported.

Signed-off-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: default avatarArchit Taneja <architt@codeaurora.org>
Link: http://patchwork.freedesktop.org/patch/msgid/1485935272-17337-22-git-send-email-a.hajda@samsung.com
parent bf1722ca

drivers/gpu/drm/bridge/sil-sii8620.c

+23 −4
Original line number Diff line number Diff line
@@ -1676,6 +1676,25 @@ static void sii8620_got_ecbus_speed(struct sii8620 *ctx, int ret) 
	sii8620_mt_set_cont(ctx, sii8620_ecbus_up);

}



static void sii8620_mhl_burst_emsc_support_set(struct mhl_burst_emsc_support *d,

	enum mhl_burst_id id)

{

	sii8620_mhl_burst_hdr_set(&d->hdr, MHL_BURST_ID_EMSC_SUPPORT);

	d->num_entries = 1;

	d->burst_id[0] = cpu_to_be16(id);

}



static void sii8620_send_features(struct sii8620 *ctx)

{

	u8 buf[16];



	sii8620_write(ctx, REG_MDT_XMIT_CTRL, BIT_MDT_XMIT_CTRL_EN

		| BIT_MDT_XMIT_CTRL_FIXED_BURST_LEN);

	sii8620_mhl_burst_emsc_support_set((void *)buf,

		MHL_BURST_ID_HID_PAYLOAD);

	sii8620_write_buf(ctx, REG_MDT_XMIT_WRITE_PORT, buf, ARRAY_SIZE(buf));

}



static void sii8620_msc_mr_set_int(struct sii8620 *ctx)

{

	u8 ints[MHL_INT_SIZE];
@@ -1696,10 +1715,10 @@ static void sii8620_msc_mr_set_int(struct sii8620 *ctx) 
			break;

		}

	}

	if (ints[MHL_INT_RCHANGE] & MHL_INT_RC_FEAT_REQ) {

		sii8620_mt_set_int(ctx, MHL_INT_REG(RCHANGE),

				   MHL_INT_RC_FEAT_COMPLETE);

	}

	if (ints[MHL_INT_RCHANGE] & MHL_INT_RC_FEAT_REQ)

		sii8620_send_features(ctx);

	if (ints[MHL_INT_RCHANGE] & MHL_INT_RC_FEAT_COMPLETE)

		sii8620_edid_read(ctx, 0);

}



static struct sii8620_mt_msg *sii8620_msc_msg_first(struct sii8620 *ctx)

drivers/gpu/drm/bridge/sil-sii8620.h

+8 −8
Original line number Diff line number Diff line
@@ -1298,14 +1298,14 @@ 


/* MDT Transmit Control, default value: 0x70 */

#define REG_MDT_XMIT_CTRL			0x0588

#define BIT_MDT_XMIT_CTRL_MDT_XMIT_EN		BIT(7)

#define BIT_MDT_XMIT_CTRL_MDT_XMIT_CMD_MERGE_EN	BIT(6)

#define BIT_MDT_XMIT_CTRL_MDT_XMIT_FIXED_BURST_LEN BIT(5)

#define BIT_MDT_XMIT_CTRL_MDT_XMIT_FIXED_AID	BIT(4)

#define BIT_MDT_XMIT_CTRL_MDT_XMIT_SINGLE_RUN_EN BIT(3)

#define BIT_MDT_XMIT_CTRL_MDT_CLR_ABORT_WAIT	BIT(2)

#define BIT_MDT_XMIT_CTRL_MDT_XFIFO_CLR_ALL	BIT(1)

#define BIT_MDT_XMIT_CTRL_MDT_XFIFO_CLR_CUR	BIT(0)

#define BIT_MDT_XMIT_CTRL_EN			BIT(7)

#define BIT_MDT_XMIT_CTRL_CMD_MERGE_EN		BIT(6)

#define BIT_MDT_XMIT_CTRL_FIXED_BURST_LEN	BIT(5)

#define BIT_MDT_XMIT_CTRL_FIXED_AID		BIT(4)

#define BIT_MDT_XMIT_CTRL_SINGLE_RUN_EN		BIT(3)

#define BIT_MDT_XMIT_CTRL_CLR_ABORT_WAIT	BIT(2)

#define BIT_MDT_XMIT_CTRL_XFIFO_CLR_ALL		BIT(1)

#define BIT_MDT_XMIT_CTRL_XFIFO_CLR_CUR		BIT(0)



/* MDT Receive WRITE Port, default value: 0x00 */

#define REG_MDT_XMIT_WRITE_PORT			0x0589