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Commit 24e700e2 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 apic updates from Thomas Gleixner:
 "This update provides:

   - Cleanup of the IDT management including the removal of the extra
     tracing IDT. A first step to cleanup the vector management code.

   - The removal of the paravirt op adjust_exception_frame. This is a
     XEN specific issue, but merged through this branch to avoid nasty
     merge collisions

   - Prevent dmesg spam about the TSC DEADLINE bug, when the CPU has
     disabled the TSC DEADLINE timer in CPUID.

   - Adjust a debug message in the ioapic code to print out the
     information correctly"

* 'x86-apic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (51 commits)
  x86/idt: Fix the X86_TRAP_BP gate
  x86/xen: Get rid of paravirt op adjust_exception_frame
  x86/eisa: Add missing include
  x86/idt: Remove superfluous ALIGNment
  x86/apic: Silence "FW_BUG TSC_DEADLINE disabled due to Errata" on CPUs without the feature
  x86/idt: Remove the tracing IDT leftovers
  x86/idt: Hide set_intr_gate()
  x86/idt: Simplify alloc_intr_gate()
  x86/idt: Deinline setup functions
  x86/idt: Remove unused functions/inlines
  x86/idt: Move interrupt gate initialization to IDT code
  x86/idt: Move APIC gate initialization to tables
  x86/idt: Move regular trap init to tables
  x86/idt: Move IST stack based traps to table init
  x86/idt: Move debug stack init to table based
  x86/idt: Switch early trap init to IDT tables
  x86/idt: Prepare for table based init
  x86/idt: Move early IDT setup out of 32-bit asm
  x86/idt: Move early IDT handler setup to IDT code
  x86/idt: Consolidate IDT invalidation
  ...
parents f5709176 c6ef8942

arch/x86/boot/compressed/eboot.c

+4 −4
Original line number Diff line number Diff line
@@ -1058,7 +1058,7 @@ struct boot_params *efi_main(struct efi_config *c, 
		desc->s = DESC_TYPE_CODE_DATA;

		desc->dpl = 0;

		desc->p = 1;

		desc->limit = 0xf;

		desc->limit1 = 0xf;

		desc->avl = 0;

		desc->l = 0;

		desc->d = SEG_OP_SIZE_32BIT;
@@ -1078,7 +1078,7 @@ struct boot_params *efi_main(struct efi_config *c, 
	desc->s = DESC_TYPE_CODE_DATA;

	desc->dpl = 0;

	desc->p = 1;

	desc->limit = 0xf;

	desc->limit1 = 0xf;

	desc->avl = 0;

	if (IS_ENABLED(CONFIG_X86_64)) {

		desc->l = 1;
@@ -1099,7 +1099,7 @@ struct boot_params *efi_main(struct efi_config *c, 
	desc->s = DESC_TYPE_CODE_DATA;

	desc->dpl = 0;

	desc->p = 1;

	desc->limit = 0xf;

	desc->limit1 = 0xf;

	desc->avl = 0;

	desc->l = 0;

	desc->d = SEG_OP_SIZE_32BIT;
@@ -1116,7 +1116,7 @@ struct boot_params *efi_main(struct efi_config *c, 
		desc->s = 0;

		desc->dpl = 0;

		desc->p = 1;

		desc->limit = 0x0;

		desc->limit1 = 0x0;

		desc->avl = 0;

		desc->l = 0;

		desc->d = 0;

arch/x86/entry/entry_32.S

+2 −18
Original line number Diff line number Diff line
@@ -673,16 +673,8 @@ ENTRY(name) \ 
	jmp	ret_from_intr;		\

ENDPROC(name)





#ifdef CONFIG_TRACING

# define TRACE_BUILD_INTERRUPT(name, nr)	BUILD_INTERRUPT3(trace_##name, nr, smp_trace_##name)

#else

# define TRACE_BUILD_INTERRUPT(name, nr)

#endif



#define BUILD_INTERRUPT(name, nr)		\

	BUILD_INTERRUPT3(name, nr, smp_##name);	\

	TRACE_BUILD_INTERRUPT(name, nr)



/* The include is where all of the SMP etc. interrupts come from */

#include <asm/entry_arch.h>
@@ -891,14 +883,6 @@ BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR, 


#endif /* CONFIG_HYPERV */



#ifdef CONFIG_TRACING

ENTRY(trace_page_fault)

	ASM_CLAC

	pushl	$trace_do_page_fault

	jmp	common_exception

END(trace_page_fault)

#endif



ENTRY(page_fault)

	ASM_CLAC

	pushl	$do_page_fault

arch/x86/entry/entry_64.S

+5 −44
Original line number Diff line number Diff line
@@ -748,18 +748,6 @@ ENTRY(\sym) 
END(\sym)

.endm



#ifdef CONFIG_TRACING

#define trace(sym) trace_##sym

#define smp_trace(sym) smp_trace_##sym



.macro trace_apicinterrupt num sym

apicinterrupt3 \num trace(\sym) smp_trace(\sym)

.endm

#else

.macro trace_apicinterrupt num sym do_sym

.endm

#endif



/* Make sure APIC interrupt handlers end up in the irqentry section: */

#define PUSH_SECTION_IRQENTRY	.pushsection .irqentry.text, "ax"

#define POP_SECTION_IRQENTRY	.popsection
@@ -767,7 +755,6 @@ apicinterrupt3 \num trace(\sym) smp_trace(\sym) 
.macro apicinterrupt num sym do_sym

PUSH_SECTION_IRQENTRY

apicinterrupt3 \num \sym \do_sym

trace_apicinterrupt \num \sym

POP_SECTION_IRQENTRY

.endm
@@ -829,7 +816,6 @@ ENTRY(\sym) 
	.endif



	ASM_CLAC

	PARAVIRT_ADJUST_EXCEPTION_FRAME



	.ifeq \has_error_code

	pushq	$-1				/* ORIG_RAX: no syscall to restart */
@@ -913,17 +899,6 @@ ENTRY(\sym) 
END(\sym)

.endm



#ifdef CONFIG_TRACING

.macro trace_idtentry sym do_sym has_error_code:req

idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code

idtentry \sym \do_sym has_error_code=\has_error_code

.endm

#else

.macro trace_idtentry sym do_sym has_error_code:req

idtentry \sym \do_sym has_error_code=\has_error_code

.endm

#endif



idtentry divide_error			do_divide_error			has_error_code=0

idtentry overflow			do_overflow			has_error_code=0

idtentry bounds				do_bounds			has_error_code=0
@@ -986,7 +961,7 @@ ENTRY(do_softirq_own_stack) 
ENDPROC(do_softirq_own_stack)



#ifdef CONFIG_XEN

idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0

idtentry hypervisor_callback xen_do_hypervisor_callback has_error_code=0



/*

 * A note on the "critical region" in our callback handler.
@@ -1053,8 +1028,6 @@ ENTRY(xen_failsafe_callback) 
	movq	8(%rsp), %r11

	addq	$0x30, %rsp

	pushq	$0				/* RIP */

	pushq	%r11

	pushq	%rcx

	UNWIND_HINT_IRET_REGS offset=8

	jmp	general_protection

1:	/* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
@@ -1085,13 +1058,12 @@ idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK 
idtentry stack_segment		do_stack_segment	has_error_code=1



#ifdef CONFIG_XEN

idtentry xen_debug		do_debug		has_error_code=0

idtentry xen_int3		do_int3			has_error_code=0

idtentry xen_stack_segment	do_stack_segment	has_error_code=1

idtentry xendebug		do_debug		has_error_code=0

idtentry xenint3		do_int3			has_error_code=0

#endif



idtentry general_protection	do_general_protection	has_error_code=1

trace_idtentry page_fault	do_page_fault		has_error_code=1

idtentry page_fault		do_page_fault		has_error_code=1



#ifdef CONFIG_KVM_GUEST

idtentry async_page_fault	do_async_page_fault	has_error_code=1
@@ -1251,20 +1223,9 @@ ENTRY(error_exit) 
END(error_exit)



/* Runs on exception stack */

/* XXX: broken on Xen PV */

ENTRY(nmi)

	UNWIND_HINT_IRET_REGS

	/*

	 * Fix up the exception frame if we're on Xen.

	 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most

	 * one value to the stack on native, so it may clobber the rdx

	 * scratch slot, but it won't clobber any of the important

	 * slots past it.

	 *

	 * Xen is a different story, because the Xen frame itself overlaps

	 * the "NMI executing" variable.

	 */

	PARAVIRT_ADJUST_EXCEPTION_FRAME



	/*

	 * We allow breakpoints in NMIs. If a breakpoint occurs, then

	 * the iretq it performs will take us out of NMI context.

arch/x86/entry/entry_64_compat.S

+0 −1
Original line number Diff line number Diff line
@@ -293,7 +293,6 @@ ENTRY(entry_INT80_compat) 
	/*

	 * Interrupts are off on entry.

	 */

	PARAVIRT_ADJUST_EXCEPTION_FRAME

	ASM_CLAC			/* Do this early to minimize exposure */

	SWAPGS

arch/x86/entry/vdso/vma.c

+1 −1
Original line number Diff line number Diff line
@@ -351,7 +351,7 @@ static void vgetcpu_cpu_init(void *arg) 
	 * and 8 bits for the node)

	 */

	d.limit0 = cpu | ((node & 0xf) << 12);

	d.limit = node >> 4;

	d.limit1 = node >> 4;

	d.type = 5;		/* RO data, expand down, accessed */

	d.dpl = 3;		/* Visible to user code */

	d.s = 1;		/* Not a system segment */