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Commit 21330497 authored by Tony Lindgren's avatar Tony Lindgren Committed by Michael Turquette
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clk: ti: Add support for dm814x ADPLL 



On dm814x we have 13 ADPLLs with 3 to 4 outputs on each. The
ADPLLs have several dividers and muxes controlled by a shared
control register for each PLL.

Note that for the clocks to work as device drivers for booting on
dm814x, this patch depends on "ARM: OMAP2+: Change core_initcall
levels to postcore_initcall" that has already been merged.

Also note that this patch does not implement clk_set_rate for the
PLL, that will be posted later on when available.

Cc: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: default avatarTero Kristo <t-kristo@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarMichael Turquette <mturquette@baylibre.com>
parent 92e963f5

Documentation/devicetree/bindings/clock/ti/adpll.txt

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Binding for Texas Instruments ADPLL clock.



Binding status: Unstable - ABI compatibility may be broken in the future



This binding uses the common clock binding[1]. It assumes a

register-mapped ADPLL with two to three selectable input clocks

and three to four children.



[1] Documentation/devicetree/bindings/clock/clock-bindings.txt



Required properties:

- compatible : shall be one of "ti,dm814-adpll-s-clock" or

  "ti,dm814-adpll-lj-clock" depending on the type of the ADPLL

- #clock-cells : from common clock binding; shall be set to 1.

- clocks : link phandles of parent clocks clkinp and clkinpulow, note

  that the adpll-s-clock also has an optional clkinphif

- reg : address and length of the register set for controlling the ADPLL.



Examples:

	adpll_mpu_ck: adpll@40 {

		#clock-cells = <1>;

		compatible = "ti,dm814-adpll-s-clock";

		reg = <0x40 0x40>;

		clocks = <&devosc_ck &devosc_ck &devosc_ck>;

		clock-names = "clkinp", "clkinpulow", "clkinphif";

		clock-output-names = "481c5040.adpll.dcoclkldo",

				     "481c5040.adpll.clkout",

				     "481c5040.adpll.clkoutx2",

				     "481c5040.adpll.clkouthif";

	};



	adpll_dsp_ck: adpll@80 {

		#clock-cells = <1>;

		compatible = "ti,dm814-adpll-lj-clock";

		reg = <0x80 0x30>;

		clocks = <&devosc_ck &devosc_ck>;

		clock-names = "clkinp", "clkinpulow";

		clock-output-names = "481c5080.adpll.dcoclkldo",

				     "481c5080.adpll.clkout",

				     "481c5080.adpll.clkoutldo";

	};

drivers/clk/Kconfig

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@@ -203,6 +203,7 @@ config COMMON_CLK_CDCE706 
source "drivers/clk/bcm/Kconfig"

source "drivers/clk/hisilicon/Kconfig"

source "drivers/clk/qcom/Kconfig"

source "drivers/clk/ti/Kconfig"



endmenu

drivers/clk/ti/Kconfig

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config COMMON_CLK_TI_ADPLL

	tristate "Clock driver for dm814x ADPLL"

	depends on ARCH_OMAP2PLUS || COMPILE_TEST

	default y if SOC_TI81XX

	---help---

	  ADPLL clock driver for the dm814x SoC using common clock framework.

drivers/clk/ti/Makefile

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@@ -18,3 +18,5 @@ obj-$(CONFIG_SOC_AM43XX) += $(clk-common) dpll3xxx.o clk-43xx.o 
ifdef CONFIG_ATAGS

obj-$(CONFIG_ARCH_OMAP3)                += clk-3xxx-legacy.o

endif



obj-$(CONFIG_COMMON_CLK_TI_ADPLL)	+= adpll.o

drivers/clk/ti/adpll.c

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File added.

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