Commit 178cd160 authored Jun 06, 2017 by Changbin Du Committed by Zhenyu Wang Jun 08, 2017

drm/i915/gvt: Tuning the size of MMIO hash lookup table to 2048



On Skylake platform, The traced virtual mmio registers are up to 2039.
So tuning the hash table size to improve lookup performance.

Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

parent fbfd76c3

drivers/gpu/drm/i915/gvt/gvt.h

+1 −1

Original line number	Diff line number	Diff line
		@@ -195,7 +195,7 @@ struct intel_gvt_fence {
		unsigned long vgpu_allocated_fence_num;
		};

		#define INTEL_GVT_MMIO_HASH_BITS 9
		#define INTEL_GVT_MMIO_HASH_BITS 11

		struct intel_gvt_mmio {
		u8 *mmio_attribute;