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Commit 13f6f62f authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'rtc-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux 

Pull RTC updates from Alexandre Belloni:
 "Core:
   - New sysfs interface to set and read clock offset
   - Drivers can now be both I2C and SPI (see pcf2127 and ds3232)

  New drivers:
   - Alphascale ASM9260
   - Epson RX6110SA
   - Maxim max20024 and max77620 (in max77686)
   - Microchip PIC32
   - NXP pcf2129 (in pcf2127)

  Subsystem wide cleanups:
   - remove IRQF_EARLY_RESUME when unecessary

  Drivers:
   - ds1307: clock output, temperature sensor and wakeup-source support
   - ds1685: actually spin forever in poweroff error path
   - ds3232: many cleanups
   - ds3234: merged in ds3232
   - hym8563: fix invalid year calculation
   - max77686: many cleanups
   - max77802 merged in max77686
   - pcf2123: cleanups and offset support
   - pcf85063: cleanups
   - pcf8523: propely handle oscillator stop bit
   - rv3029: many cleanups, trickle charger and temperature sensor support
   - rv8803: convert spin_lock to mutex_lock
   - rx8025: many fixes
   - vr41xx: restore alarm_irq_enable"

* tag 'rtc-4.6' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (86 commits)
  rtc: pcf2127: add pcf2129 device id
  rtc: pcf2127: add support for spi interface
  rtc: pcf2127: convert to use regmap
  rtc: rv3029: Add thermometer hwmon support
  rtc: rv3029: Add update_bits helper for eeprom access
  rtc: ds1685: actually spin forever in poweroff error path
  rtc: hym8563: fix invalid year calculation
  rtc: ds3232: use rtc->ops_lock to protect alarm operations
  rtc: ds3232: fix issue when irq is shared several devices
  rtc: ds3232: remove unused UIE code
  rtc: ds3232: add register access error checks
  rtc: ds3232: fix read on /dev/rtc after RTC_AIE_ON
  rtc: merge ds3232 and ds3234
  rtc: ds3232: convert to use regmap
  rtc: pxa: fix Kconfig indentation
  rtc: rv3029: Add device tree property for trickle charger
  rtc: rv3029: Add functions for EEPROM access
  rtc: rv3029: Add i2c register update-bits helper
  rtc: rv3029: Add missing register definitions
  rtc: rv3029: Add "rv3029" I2C device id
  ...
parents f0718cea cee2cc21

Documentation/devicetree/bindings/rtc/alphascale,asm9260-rtc.txt

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* Alphascale asm9260 SoC Real Time Clock



Required properties:

- compatible: Should be "alphascale,asm9260-rtc"

- reg: Physical base address of the controller and length

       of memory mapped region.

- interrupts: IRQ line for the RTC.

- clocks: Reference to the clock entry.

- clock-names: should contain:

  * "ahb" for the SoC RTC clock



Example:

rtc0: rtc@800a0000 {

	compatible = "alphascale,asm9260-rtc";

	reg = <0x800a0000 0x100>;

	clocks = <&acc CLKID_AHB_RTC>;

	clock-names = "ahb";

	interrupts = <2>;

};

Documentation/devicetree/bindings/rtc/epson,rx6110.txt

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Epson RX6110 Real Time Clock

============================



The Epson RX6110 can be used with SPI or I2C busses. The kind of

bus depends on the SPISEL pin and can not be configured via software.



I2C mode

--------



Required properties:

  - compatible: should be: "epson,rx6110"

  - reg : the I2C address of the device for I2C



Example:



	rtc: rtc@32 {

		compatible = "epson,rx6110"

		reg = <0x32>;

	};



SPI mode

--------



Required properties:

  - compatible: should be: "epson,rx6110"

  - reg: chip select number

  - spi-cs-high: RX6110 needs chipselect high

  - spi-cpha: RX6110 works with SPI shifted clock phase

  - spi-cpol: RX6110 works with SPI inverse clock polarity



Example:



	rtc: rtc@3 {

		compatible = "epson,rx6110"

		reg = <3>

		spi-cs-high;

		spi-cpha;

		spi-cpol;

	};

Documentation/devicetree/bindings/rtc/maxim,ds3231.txt

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* Maxim DS3231 Real Time Clock



Required properties:

see: Documentation/devicetree/bindings/i2c/trivial-devices.txt



Optional property:

- #clock-cells: Should be 1.

- clock-output-names:

  overwrite the default clock names "ds3231_clk_sqw" and "ds3231_clk_32khz".



Each clock is assigned an identifier and client nodes can use this identifier

to specify the clock which they consume. Following indices are allowed:

    - 0: square-wave output on the SQW pin

    - 1: square-wave output on the 32kHz pin



- interrupts: rtc alarm/event interrupt. When this property is selected,

  clock on the SQW pin cannot be used.



Example:



ds3231: ds3231@51 {

	compatible = "maxim,ds3231";

	reg = <0x68>;

	#clock-cells = <1>;

};



device1 {

...

	clocks = <&ds3231 0>;

...

};



device2 {

...

	clocks = <&ds3231 1>;

...

};

Documentation/devicetree/bindings/rtc/microchip,pic32-rtc.txt

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* Microchip PIC32 Real Time Clock and Calendar



The RTCC keeps time in hours, minutes, and seconds, and one half second. It

provides a calendar in weekday, date, month, and year. It also provides a

configurable alarm.



Required properties:

- compatible: should be: "microchip,pic32mzda-rtc"

- reg: physical base address of the controller and length of memory mapped

    region.

- interrupts: RTC alarm/event interrupt

- clocks: clock phandle



Example:



	rtc: rtc@1f8c0000 {

		compatible = "microchip,pic32mzda-rtc";

		reg = <0x1f8c0000 0x60>;

		interrupts = <166 IRQ_TYPE_EDGE_RISING>;

		clocks = <&PBCLK6>;

	};

Documentation/rtc.txt

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@@ -157,6 +157,12 @@ wakealarm: The time at which the clock will generate a system wakeup 
		 the epoch by default, or if there's a leading +, seconds in the

		 the epoch by default, or if there's a leading +, seconds in the

		 future, or if there is a leading +=, seconds ahead of the current

		 future, or if there is a leading +=, seconds ahead of the current

		 alarm.

		 alarm.

offset:		 The amount which the rtc clock has been adjusted in firmware.

		 Visible only if the driver supports clock offset adjustment.

		 The unit is parts per billion, i.e. The number of clock ticks

		 which are added to or removed from the rtc's base clock per

		 billion ticks. A positive value makes a day pass more slowly,

		 longer, and a negative value makes a day pass more quickly.





IOCTL INTERFACE

IOCTL INTERFACE

---------------

---------------