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Commit 11ab1cae authored by Yazen Ghannam's avatar Yazen Ghannam Committed by Borislav Petkov
Browse files

EDAC, amd64: Rework messages in ecc_enabled() 



Print the node number when informing that DRAM ECC is disabled so
that we can show which nodes have DRAM ECC disabled. Also, print more
detailed system information as edac_dbg(), so as to not bother general
users.

Switch amd64_notice to amd64_info to match the message above it.

Signed-off-by: default avatarYazen Ghannam <Yazen.Ghannam@amd.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1485537863-2707-5-git-send-email-Yazen.Ghannam@amd.com


Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
parent 234365f5

drivers/edac/amd64_edac.c

+6 −3
Original line number Diff line number Diff line
@@ -3065,6 +3065,8 @@ static bool ecc_enabled(struct pci_dev *F3, u16 nid) 
		/* Check whether at least one UMC is enabled: */

		if (umc_en_mask)

			ecc_en = umc_en_mask == ecc_en_mask;

		else

			edac_dbg(0, "Node %d: No enabled UMCs.\n", nid);



		/* Assume UMC MCA banks are enabled. */

		nb_mce_en = true;
@@ -3075,14 +3077,15 @@ static bool ecc_enabled(struct pci_dev *F3, u16 nid) 


		nb_mce_en = nb_mce_bank_enabled_on_node(nid);

		if (!nb_mce_en)

			amd64_notice("NB MCE bank disabled, set MSR 0x%08x[4] on node %d to enable.\n",

			edac_dbg(0, "NB MCE bank disabled, set MSR 0x%08x[4] on node %d to enable.\n",

				     MSR_IA32_MCG_CTL, nid);

	}



	amd64_info("DRAM ECC %s.\n", (ecc_en ? "enabled" : "disabled"));

	amd64_info("Node %d: DRAM ECC %s.\n",

		   nid, (ecc_en ? "enabled" : "disabled"));



	if (!ecc_en || !nb_mce_en) {

		amd64_notice("%s", ecc_msg);

		amd64_info("%s", ecc_msg);

		return false;

	}

	return true;