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Commit 10dd2b86 authored by Harry Wentland's avatar Harry Wentland Committed by Alex Deucher
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drm/amd/display: Fix wrong latency assignment for VEGA clock levels



Also drop wrong 10kHz comment

Fixes: drm/amd/display: Implement dm_pp_get_clock_levels_by_type_with_latency
Signed-off-by: default avatarHarry Wentland <harry.wentland@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6201e033
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+1 −2
Original line number Diff line number Diff line
@@ -256,9 +256,8 @@ static void pp_to_dc_clock_levels_with_latency(

	for (i = 0; i < clk_level_info->num_levels; i++) {
		DRM_DEBUG("DM_PPLIB:\t %d\n", pp_clks->data[i].clocks_in_khz);
		/* translate 10kHz to kHz */
		clk_level_info->data[i].clocks_in_khz = pp_clks->data[i].clocks_in_khz;
		clk_level_info->data[i].latency_in_us = pp_clks->data[i].clocks_in_khz;
		clk_level_info->data[i].latency_in_us = pp_clks->data[i].latency_in_us;
	}
}