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Commit 0cee73f7 authored by Yuantian Tang's avatar Yuantian Tang Committed by Tejun Heo
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ahci: qoriq: add ls1088a platforms support 



Ls1088a is new introduced arm-based soc with sata support with
following features:

* Complies with the serial ATA 3.0 specification
  and the AHCI 1.3.1 specification
* Contains a high-speed descriptor-based DMA controller
* Supports the following:
* Speeds of 1.5 Gb/s (first-generation SATA),
  3 Gb/s (second-generation SATA), and 6 Gb/s (third-generation SATA)
* FIS-based switching
* Native command queuing (NCQ) commands
* Port multiplier operation
* Asynchronous notification
* SATA Vendor BIST mode

Signed-off-by: default avatarTang Yuantian <andy.tang@nxp.com>
Signed-off-by: default avatarTejun Heo <tj@kernel.org>
parent 74ee91d8

drivers/ata/ahci_qoriq.c

+14 −0
Original line number Original line Diff line number Diff line
@@ -47,12 +47,14 @@ 




#define SATA_ECC_DISABLE	0x00020000

#define SATA_ECC_DISABLE	0x00020000

#define ECC_DIS_ARMV8_CH2	0x80000000

#define ECC_DIS_ARMV8_CH2	0x80000000

#define ECC_DIS_LS1088A		0x40000000





enum ahci_qoriq_type {

enum ahci_qoriq_type {

	AHCI_LS1021A,

	AHCI_LS1021A,

	AHCI_LS1043A,

	AHCI_LS1043A,

	AHCI_LS2080A,

	AHCI_LS2080A,

	AHCI_LS1046A,

	AHCI_LS1046A,

	AHCI_LS1088A,

	AHCI_LS2088A,

	AHCI_LS2088A,

};

};
@@ -68,6 +70,7 @@ static const struct of_device_id ahci_qoriq_of_match[] = { 
	{ .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A},

	{ .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A},

	{ .compatible = "fsl,ls2080a-ahci", .data = (void *)AHCI_LS2080A},

	{ .compatible = "fsl,ls2080a-ahci", .data = (void *)AHCI_LS2080A},

	{ .compatible = "fsl,ls1046a-ahci", .data = (void *)AHCI_LS1046A},

	{ .compatible = "fsl,ls1046a-ahci", .data = (void *)AHCI_LS1046A},

	{ .compatible = "fsl,ls1088a-ahci", .data = (void *)AHCI_LS1088A},

	{ .compatible = "fsl,ls2088a-ahci", .data = (void *)AHCI_LS2088A},

	{ .compatible = "fsl,ls2088a-ahci", .data = (void *)AHCI_LS2088A},

	{},

	{},

};

};
@@ -203,6 +206,17 @@ static int ahci_qoriq_phy_init(struct ahci_host_priv *hpriv) 
			writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);

			writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);

		break;

		break;





	case AHCI_LS1088A:

		if (!qpriv->ecc_addr)

			return -EINVAL;

		writel(readl(qpriv->ecc_addr) | ECC_DIS_LS1088A,

		       qpriv->ecc_addr);

		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);

		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);

		if (qpriv->is_dmacoherent)

			writel(AHCI_PORT_AXICC_CFG, reg_base + PORT_AXICC);

		break;



	case AHCI_LS2088A:

	case AHCI_LS2088A:

		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);

		writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1);

		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);

		writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS);