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Commit 09d7e785 authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms: fix typos in evergreen command checker 



Signed-off-by: default avatarAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 07bb084c

drivers/gpu/drm/radeon/evergreen_cs.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -1197,7 +1197,7 @@ static int evergreen_packet3_check(struct radeon_cs_parser *p, 
					DRM_ERROR("bad SET_RESOURCE (tex)\n");

					DRM_ERROR("bad SET_RESOURCE (tex)\n");

					return -EINVAL;

					return -EINVAL;

				}

				}

				ib[idx+1+(i*8)+3] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);

				ib[idx+1+(i*8)+2] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);

				if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)

				if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)

					ib[idx+1+(i*8)+1] |= TEX_ARRAY_MODE(ARRAY_2D_TILED_THIN1);

					ib[idx+1+(i*8)+1] |= TEX_ARRAY_MODE(ARRAY_2D_TILED_THIN1);

				else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)

				else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
@@ -1209,7 +1209,7 @@ static int evergreen_packet3_check(struct radeon_cs_parser *p, 
					DRM_ERROR("bad SET_RESOURCE (tex)\n");

					DRM_ERROR("bad SET_RESOURCE (tex)\n");

					return -EINVAL;

					return -EINVAL;

				}

				}

				ib[idx+1+(i*8)+4] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);

				ib[idx+1+(i*8)+3] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);

				mipmap = reloc->robj;

				mipmap = reloc->robj;

				r = evergreen_check_texture_resource(p,  idx+1+(i*8),

				r = evergreen_check_texture_resource(p,  idx+1+(i*8),

						texture, mipmap);

						texture, mipmap);

drivers/gpu/drm/radeon/reg_srcs/evergreen

+5 −5
Original line number Original line Diff line number Diff line
@@ -80,8 +80,8 @@ evergreen 0x9400 
0x00028010 DB_RENDER_OVERRIDE2

0x00028010 DB_RENDER_OVERRIDE2

0x00028028 DB_STENCIL_CLEAR

0x00028028 DB_STENCIL_CLEAR

0x0002802C DB_DEPTH_CLEAR

0x0002802C DB_DEPTH_CLEAR

0x00028034 PA_SC_SCREEN_SCISSOR_BR

0x00028030 PA_SC_SCREEN_SCISSOR_TL

0x00028030 PA_SC_SCREEN_SCISSOR_TL

0x00028034 PA_SC_SCREEN_SCISSOR_BR

0x0002805C DB_DEPTH_SLICE

0x0002805C DB_DEPTH_SLICE

0x00028140 SQ_ALU_CONST_BUFFER_SIZE_PS_0

0x00028140 SQ_ALU_CONST_BUFFER_SIZE_PS_0

0x00028144 SQ_ALU_CONST_BUFFER_SIZE_PS_1

0x00028144 SQ_ALU_CONST_BUFFER_SIZE_PS_1
@@ -460,8 +460,8 @@ evergreen 0x9400 
0x00028844 SQ_PGM_RESOURCES_PS

0x00028844 SQ_PGM_RESOURCES_PS

0x00028848 SQ_PGM_RESOURCES_2_PS

0x00028848 SQ_PGM_RESOURCES_2_PS

0x0002884C SQ_PGM_EXPORTS_PS

0x0002884C SQ_PGM_EXPORTS_PS

0x0002885C SQ_PGM_RESOURCES_VS

0x00028860 SQ_PGM_RESOURCES_VS

0x00028860 SQ_PGM_RESOURCES_2_VS

0x00028864 SQ_PGM_RESOURCES_2_VS

0x00028878 SQ_PGM_RESOURCES_GS

0x00028878 SQ_PGM_RESOURCES_GS

0x0002887C SQ_PGM_RESOURCES_2_GS

0x0002887C SQ_PGM_RESOURCES_2_GS

0x00028890 SQ_PGM_RESOURCES_ES

0x00028890 SQ_PGM_RESOURCES_ES
@@ -469,8 +469,8 @@ evergreen 0x9400 
0x000288A8 SQ_PGM_RESOURCES_FS

0x000288A8 SQ_PGM_RESOURCES_FS

0x000288BC SQ_PGM_RESOURCES_HS

0x000288BC SQ_PGM_RESOURCES_HS

0x000288C0 SQ_PGM_RESOURCES_2_HS

0x000288C0 SQ_PGM_RESOURCES_2_HS

0x000288D0 SQ_PGM_RESOURCES_LS

0x000288D4 SQ_PGM_RESOURCES_LS

0x000288D4 SQ_PGM_RESOURCES_2_LS

0x000288D8 SQ_PGM_RESOURCES_2_LS

0x000288E8 SQ_LDS_ALLOC

0x000288E8 SQ_LDS_ALLOC

0x000288EC SQ_LDS_ALLOC_PS

0x000288EC SQ_LDS_ALLOC_PS

0x000288F0 SQ_VTX_SEMANTIC_CLEAR

0x000288F0 SQ_VTX_SEMANTIC_CLEAR