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Commit 0805909f authored by Jiri Olsa's avatar Jiri Olsa Committed by Arnaldo Carvalho de Melo
Browse files

perf hists: Fix HISTC_MEM_DCACHELINE width setting 



Set correct width for unresolved mem_dcacheline addr.

Signed-off-by: default avatarJiri Olsa <jolsa@kernel.org>
Cc: David Ahern <dsahern@gmail.com>
Cc: Don Zickus <dzickus@redhat.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Fixes: 9b32ba71 ("perf tools: Add dcacheline sort")
Link: http://lkml.kernel.org/r/1453290995-18485-3-git-send-email-jolsa@kernel.org


Signed-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent d4913cbd

tools/perf/util/hist.c

+2 −0
Original line number Diff line number Diff line
@@ -131,6 +131,8 @@ void hists__calc_col_len(struct hists *hists, struct hist_entry *h) 
			symlen = unresolved_col_width + 4 + 2;

			hists__new_col_len(hists, HISTC_MEM_DADDR_SYMBOL,

					   symlen);

			hists__new_col_len(hists, HISTC_MEM_DCACHELINE,

					   symlen);

		}



		if (h->mem_info->iaddr.sym) {