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Commit 078bc005 authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Jason Cooper
Browse files

irqchip: spear_shirq: Move private structs to source 



No point in having them in a separate header file. Make the init
functions static.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20140619212713.038658058@linutronix.de


Acked-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent a26c06f9

drivers/irqchip/spear-shirq.c

+45 −7
Original line number Diff line number Diff line
@@ -19,7 +19,6 @@ 
#include <linux/io.h>

#include <linux/irq.h>

#include <linux/irqdomain.h>

#include <linux/irqchip/spear-shirq.h>

#include <linux/of.h>

#include <linux/of_address.h>

#include <linux/of_irq.h>
@@ -27,6 +26,45 @@ 


#include "irqchip.h"



/*

 * struct shirq_regs: shared irq register configuration

 *

 * enb_reg: enable register offset

 * reset_to_enb: val 1 indicates, we need to clear bit for enabling interrupt

 * status_reg: status register offset

 * status_reg_mask: status register valid mask

 * clear_reg: clear register offset

 * reset_to_clear: val 1 indicates, we need to clear bit for clearing interrupt

 */

struct shirq_regs {

	u32 enb_reg;

	u32 reset_to_enb;

	u32 status_reg;

	u32 clear_reg;

	u32 reset_to_clear;

};



/*

 * struct spear_shirq: shared irq structure

 *

 * irq: hardware irq number

 * irq_base: base irq in linux domain

 * irq_nr: no. of shared interrupts in a particular block

 * irq_bit_off: starting bit offset in the status register

 * invalid_irq: irq group is currently disabled

 * base: base address of shared irq register

 * regs: register configuration for shared irq block

 */

struct spear_shirq {

	u32 irq;

	u32 irq_base;

	u32 irq_nr;

	u32 irq_bit_off;

	int invalid_irq;

	void __iomem *base;

	struct shirq_regs regs;

};



static DEFINE_SPINLOCK(lock);



/* spear300 shared irq registers offsets and masks */
@@ -296,7 +334,7 @@ static int __init shirq_init(struct spear_shirq **shirq_blocks, int block_nr, 
	return -ENXIO;

}



int __init spear300_shirq_of_init(struct device_node *np,

static int __init spear300_shirq_of_init(struct device_node *np,

					 struct device_node *parent)

{

	return shirq_init(spear300_shirq_blocks,
@@ -304,7 +342,7 @@ int __init spear300_shirq_of_init(struct device_node *np, 
}

IRQCHIP_DECLARE(spear300_shirq, "st,spear300-shirq", spear300_shirq_of_init);



int __init spear310_shirq_of_init(struct device_node *np,

static int __init spear310_shirq_of_init(struct device_node *np,

					 struct device_node *parent)

{

	return shirq_init(spear310_shirq_blocks,
@@ -312,7 +350,7 @@ int __init spear310_shirq_of_init(struct device_node *np, 
}

IRQCHIP_DECLARE(spear310_shirq, "st,spear310-shirq", spear310_shirq_of_init);



int __init spear320_shirq_of_init(struct device_node *np,

static int __init spear320_shirq_of_init(struct device_node *np,

					 struct device_node *parent)

{

	return shirq_init(spear320_shirq_blocks,

include/linux/irqchip/spear-shirq.h

deleted100644 → 0
+0 −64
Original line number Diff line number Diff line 
/*

 * SPEAr platform shared irq layer header file

 *

 * Copyright (C) 2009-2012 ST Microelectronics

 * Viresh Kumar <viresh.linux@gmail.com>

 *

 * This file is licensed under the terms of the GNU General Public

 * License version 2. This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 */



#ifndef __SPEAR_SHIRQ_H

#define __SPEAR_SHIRQ_H



#include <linux/irq.h>

#include <linux/types.h>



/*

 * struct shirq_regs: shared irq register configuration

 *

 * enb_reg: enable register offset

 * reset_to_enb: val 1 indicates, we need to clear bit for enabling interrupt

 * status_reg: status register offset

 * status_reg_mask: status register valid mask

 * clear_reg: clear register offset

 * reset_to_clear: val 1 indicates, we need to clear bit for clearing interrupt

 */

struct shirq_regs {

	u32 enb_reg;

	u32 reset_to_enb;

	u32 status_reg;

	u32 clear_reg;

	u32 reset_to_clear;

};



/*

 * struct spear_shirq: shared irq structure

 *

 * irq: hardware irq number

 * irq_base: base irq in linux domain

 * irq_nr: no. of shared interrupts in a particular block

 * irq_bit_off: starting bit offset in the status register

 * invalid_irq: irq group is currently disabled

 * base: base address of shared irq register

 * regs: register configuration for shared irq block

 */

struct spear_shirq {

	u32 irq;

	u32 irq_base;

	u32 irq_nr;

	u32 irq_bit_off;

	int invalid_irq;

	void __iomem *base;

	struct shirq_regs regs;

};



int __init spear300_shirq_of_init(struct device_node *np,

		struct device_node *parent);

int __init spear310_shirq_of_init(struct device_node *np,

		struct device_node *parent);

int __init spear320_shirq_of_init(struct device_node *np,

		struct device_node *parent);



#endif /* __SPEAR_SHIRQ_H */