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Commit 075167ed authored by Andre Przywara's avatar Andre Przywara Committed by Greg Kroah-Hartman
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drivers: PL011: replace UART_MIS reading with _RIS & _IMSC 



The PL011 register UART_MIS is actually a bitwise AND of the
UART_RIS and the UART_MISC register.
Since the SBSA UART does not include the _MIS register, use the
two separate registers to get the same behaviour. Since we are
inside the spinlock and we read the _IMSC register only once, there
should be no race issue.

Signed-off-by: default avatarAndre Przywara <andre.przywara@arm.com>
Tested-by: default avatarMark Langsdorf <mlangsdo@redhat.com>
Tested-by: default avatarNaresh Bhat <nbhat@cavium.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 3873e2d7

drivers/tty/serial/amba-pl011.c

+4 −2
Original line number Diff line number Diff line
@@ -1322,11 +1322,13 @@ static irqreturn_t pl011_int(int irq, void *dev_id) 
	struct uart_amba_port *uap = dev_id;

	unsigned long flags;

	unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;

	u16 imsc;

	int handled = 0;

	unsigned int dummy_read;



	spin_lock_irqsave(&uap->port.lock, flags);

	status = readw(uap->port.membase + UART011_MIS);

	imsc = readw(uap->port.membase + UART011_IMSC);

	status = readw(uap->port.membase + UART011_RIS) & imsc;

	if (status) {

		do {

			if (uap->vendor->cts_event_workaround) {
@@ -1361,7 +1363,7 @@ static irqreturn_t pl011_int(int irq, void *dev_id) 
			if (pass_counter-- == 0)

				break;



			status = readw(uap->port.membase + UART011_MIS);

			status = readw(uap->port.membase + UART011_RIS) & imsc;

		} while (status != 0);

		handled = 1;

	}