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Commit 0741bfb9 authored by Roger Quadros's avatar Roger Quadros Committed by Marc Kleine-Budde
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can: c_can: Add support for START pulse in RAMINIT sequence



Some SoCs e.g. (TI DRA7xx) need a START pulse to start the
RAMINIT sequence i.e. START bit must be set and cleared before
checking for the DONE bit status.

Signed-off-by: default avatarRoger Quadros <rogerq@ti.com>
Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parent 3ff9027c
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+1 −0
Original line number Diff line number Diff line
@@ -188,6 +188,7 @@ struct c_can_raminit {
	struct regmap *syscon;	/* for raminit ctrl. reg. access */
	unsigned int reg;	/* register index within syscon */
	struct raminit_bits bits;
	bool needs_pulse;
};

/* c_can private data structure */
+7 −0
Original line number Diff line number Diff line
@@ -120,6 +120,12 @@ static void c_can_hw_raminit_syscon(const struct c_can_priv *priv, bool enable)
		ctrl |= 1 << raminit->bits.start;
		regmap_write(raminit->syscon, raminit->reg, ctrl);

		/* clear START bit if start pulse is needed */
		if (raminit->needs_pulse) {
			ctrl &= ~(1 << raminit->bits.start);
			regmap_write(raminit->syscon, raminit->reg, ctrl);
		}

		ctrl |= 1 << raminit->bits.done;
		c_can_hw_raminit_wait_syscon(priv, mask, ctrl);
	}
@@ -325,6 +331,7 @@ static int c_can_plat_probe(struct platform_device *pdev)
			}

			raminit->bits = drvdata->raminit_bits[id];
			raminit->needs_pulse = drvdata->raminit_pulse;

			priv->raminit = c_can_hw_raminit_syscon;
		} else {