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Commit ff1b8ba0 authored by Ben Dooks's avatar Ben Dooks
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ARM: Merge for-2635/gpio2

Merge branch 'for-2635/gpio2' into for-linus/samsung2
parents 5fcdb16b 32b6cb38
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+1 −0
Original line number Diff line number Diff line
@@ -6,6 +6,7 @@ config CPU_S3C2410
	bool
	depends on ARCH_S3C2410
	select CPU_ARM920T
	select S3C_GPIO_PULL_UP
	select S3C2410_CLOCK
	select S3C2410_GPIO
	select CPU_LLSERIAL_S3C2410
+20 −12
Original line number Diff line number Diff line
@@ -33,14 +33,15 @@ static void h1940bt_enable(int on)
		h1940_latch_control(0, H1940_LATCH_BLUETOOTH_POWER);
		/* Reset the chip */
		mdelay(10);
		s3c2410_gpio_setpin(S3C2410_GPH(1), 1);

		gpio_set_value(S3C2410_GPH(1), 1);
		mdelay(10);
		s3c2410_gpio_setpin(S3C2410_GPH(1), 0);
		gpio_set_value(S3C2410_GPH(1), 0);
	}
	else {
		s3c2410_gpio_setpin(S3C2410_GPH(1), 1);
		gpio_set_value(S3C2410_GPH(1), 1);
		mdelay(10);
		s3c2410_gpio_setpin(S3C2410_GPH(1), 0);
		gpio_set_value(S3C2410_GPH(1), 0);
		mdelay(10);
		h1940_latch_control(H1940_LATCH_BLUETOOTH_POWER, 0);
	}
@@ -61,15 +62,21 @@ static int __devinit h1940bt_probe(struct platform_device *pdev)
	struct rfkill *rfk;
	int ret = 0;

	ret = gpio_request(S3C2410_GPH(1), dev_name(&pdev->dev));
	if (ret) {
		dev_err(&pdev->dev, "could not get GPH1\n");\
		return ret;
	}

	/* Configures BT serial port GPIOs */
	s3c2410_gpio_cfgpin(S3C2410_GPH(0), S3C2410_GPH0_nCTS0);
	s3c2410_gpio_pullup(S3C2410_GPH(0), 1);
	s3c2410_gpio_cfgpin(S3C2410_GPH(1), S3C2410_GPIO_OUTPUT);
	s3c2410_gpio_pullup(S3C2410_GPH(1), 1);
	s3c2410_gpio_cfgpin(S3C2410_GPH(2), S3C2410_GPH2_TXD0);
	s3c2410_gpio_pullup(S3C2410_GPH(2), 1);
	s3c2410_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0);
	s3c2410_gpio_pullup(S3C2410_GPH(3), 1);
	s3c_gpio_cfgpin(S3C2410_GPH(0), S3C2410_GPH0_nCTS0);
	s3c_gpio_cfgpull(S3C2410_GPH(0), S3C_GPIO_PULL_NONE);
	s3c_gpio_cfgpin(S3C2410_GPH(1), S3C2410_GPIO_OUTPUT);
	s3c_gpio_cfgpull(S3C2410_GPH(1), S3C_GPIO_PULL_NONE);
	s3c_gpio_cfgpin(S3C2410_GPH(2), S3C2410_GPH2_TXD0);
	s3c_gpio_cfgpull(S3C2410_GPH(2), S3C_GPIO_PULL_NONE);
	s3c_gpio_cfgpin(S3C2410_GPH(3), S3C2410_GPH3_RXD0);
	s3c_gpio_cfgpull(S3C2410_GPH(3), S3C_GPIO_PULL_NONE);


	rfk = rfkill_alloc(DRV_NAME, &pdev->dev, RFKILL_TYPE_BLUETOOTH,
@@ -100,6 +107,7 @@ static int h1940bt_remove(struct platform_device *pdev)
	struct rfkill *rfk = platform_get_drvdata(pdev);

	platform_set_drvdata(pdev, NULL);
	gpio_free(S3C2410_GPH(1));

	if (rfk) {
		rfkill_unregister(rfk);
+24 −23
Original line number Diff line number Diff line
@@ -10,14 +10,28 @@
 * published by the Free Software Foundation.
*/

#ifndef __MACH_GPIO_FNS_H
#define __MACH_GPIO_FNS_H __FILE__

/* These functions are in the to-be-removed category and it is strongly
 * encouraged not to use these in new code. They will be marked deprecated
 * very soon.
 *
 * Most of the functionality can be either replaced by the gpiocfg calls
 * for the s3c platform or by the generic GPIOlib API.
 *
 * As of 2.6.35-rc, these will be removed, with the few drivers using them
 * either replaced or given a wrapper until the calls can be removed.
*/

#include <plat/gpio-cfg.h>

static inline void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int cfg)
{
	/* 1:1 mapping between cfgpin and setcfg calls at the moment */
	s3c_gpio_cfgpin(pin, cfg);
}

/* external functions for GPIO support
 *
 * These allow various different clients to access the same GPIO
@@ -25,17 +39,6 @@
 * GPIO register, then it is safe to ioremap/__raw_{read|write} to it.
*/

/* s3c2410_gpio_cfgpin
 *
 * set the configuration of the given pin to the value passed.
 *
 * eg:
 *    s3c2410_gpio_cfgpin(S3C2410_GPA(0), S3C2410_GPA0_ADDR0);
 *    s3c2410_gpio_cfgpin(S3C2410_GPE(8), S3C2410_GPE8_SDDAT1);
*/

extern void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function);

extern unsigned int s3c2410_gpio_getcfg(unsigned int pin);

/* s3c2410_gpio_getirq
@@ -71,6 +74,14 @@ extern int s3c2400_gpio_getirq(unsigned int pin);
extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,
				  unsigned int config);

/* s3c2410_gpio_pullup
 *
 * This call should be replaced with s3c_gpio_setpull().
 *
 * As a note, there is currently no distinction between pull-up and pull-down
 * in the s3c24xx series devices with only an on/off configuration.
 */

/* s3c2410_gpio_pullup
 *
 * configure the pull-up control on the given pin
@@ -86,18 +97,8 @@ extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on,

extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to);

/* s3c2410_gpio_getpull
 *
 * Read the state of the pull-up on a given pin
 *
 * return:
 *	< 0 => error code
 *	  0 => enabled
 *	  1 => disabled
*/

extern int s3c2410_gpio_getpull(unsigned int pin);

extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to);

extern unsigned int s3c2410_gpio_getpin(unsigned int pin);

#endif /* __MACH_GPIO_FNS_H */
+31 −6
Original line number Diff line number Diff line
@@ -16,15 +16,28 @@

#define S3C2410_GPIONO(bank,offset) ((bank) + (offset))

#define S3C2410_GPIO_BANKA   (32*0)
#define S3C2410_GPIO_BANKB   (32*1)
#define S3C2410_GPIO_BANKC   (32*2)
#define S3C2410_GPIO_BANKD   (32*3)
#define S3C2410_GPIO_BANKE   (32*4)
#define S3C2410_GPIO_BANKF   (32*5)
#define S3C2410_GPIO_BANKG   (32*6)
#define S3C2410_GPIO_BANKH   (32*7)

/* GPIO sizes for various SoCs:
 *
 *             2442
 *   2410 2412 2440 2443 2416
 *   ---- ---- ---- ---- ----
 * A 23   22   25   16   25
 * B 11   11   11   11   9
 * C 16   15   16   16   16
 * D 16   16   16   16   16
 * E 16   16   16   16   16
 * F 8    8    8    8    8
 * G 16   16   16   16   8
 * H 11   11   9    15   15
 * J --   --   13   16   --
 * K --   --   --   --   16
 * L --   --   --   15   7
 * M --   --   --   2    2
 */

/* GPIO bank sizes */
#define S3C2410_GPIO_A_NR	(32)
#define S3C2410_GPIO_B_NR	(32)
@@ -34,6 +47,10 @@
#define S3C2410_GPIO_F_NR	(32)
#define S3C2410_GPIO_G_NR	(32)
#define S3C2410_GPIO_H_NR	(32)
#define S3C2410_GPIO_J_NR	(32)	/* technically 16. */
#define S3C2410_GPIO_K_NR	(32)	/* technically 16. */
#define S3C2410_GPIO_L_NR	(32)	/* technically 15. */
#define S3C2410_GPIO_M_NR	(32)	/* technically 2. */

#if CONFIG_S3C_GPIO_SPACE != 0
#error CONFIG_S3C_GPIO_SPACE cannot be zero at the moment
@@ -53,6 +70,10 @@ enum s3c_gpio_number {
	S3C2410_GPIO_F_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_E),
	S3C2410_GPIO_G_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_F),
	S3C2410_GPIO_H_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_G),
	S3C2410_GPIO_J_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_H),
	S3C2410_GPIO_K_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_J),
	S3C2410_GPIO_L_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_K),
	S3C2410_GPIO_M_START = S3C2410_GPIO_NEXT(S3C2410_GPIO_L),
};

#endif /* __ASSEMBLY__ */
@@ -67,6 +88,10 @@ enum s3c_gpio_number {
#define S3C2410_GPF(_nr)	(S3C2410_GPIO_F_START + (_nr))
#define S3C2410_GPG(_nr)	(S3C2410_GPIO_G_START + (_nr))
#define S3C2410_GPH(_nr)	(S3C2410_GPIO_H_START + (_nr))
#define S3C2410_GPJ(_nr)	(S3C2410_GPIO_J_START + (_nr))
#define S3C2410_GPK(_nr)	(S3C2410_GPIO_K_START + (_nr))
#define S3C2410_GPL(_nr)	(S3C2410_GPIO_L_START + (_nr))
#define S3C2410_GPM(_nr)	(S3C2410_GPIO_M_START + (_nr))

/* compatibility until drivers can be modified */

+2 −2
Original line number Diff line number Diff line
@@ -23,11 +23,11 @@ static inline struct s3c_gpio_chip *s3c_gpiolib_getchip(unsigned int pin)
{
	struct s3c_gpio_chip *chip;

	if (pin > S3C2410_GPG(10))
	if (pin > S3C_GPIO_END)
		return NULL;

	chip = &s3c24xx_gpios[pin/32];
	return (S3C2410_GPIO_OFFSET(pin) < chip->chip.ngpio) ? chip : NULL;
	return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL;
}

#endif /* __ASM_ARCH_GPIO_CORE_H */
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