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Commit fddb770d authored by Stephen Warren's avatar Stephen Warren
Browse files

ARM: tegra: move resume vector define to irammap.h 



irammap.h's purpose is to define the layout/usage of IRAM. As such,
TEGRA_IRAM_CODE_AREA should have been added there rather than iomap.h.
Move the define, and rename it something more descriptive.

Cc: Joseph Lo <josephl@nvidia.com>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 6ae89416

arch/arm/mach-tegra/iomap.h

+0 −2
Original line number Original line Diff line number Diff line
@@ -24,8 +24,6 @@ 
#define TEGRA_IRAM_BASE			0x40000000

#define TEGRA_IRAM_BASE			0x40000000

#define TEGRA_IRAM_SIZE			SZ_256K

#define TEGRA_IRAM_SIZE			SZ_256K





#define TEGRA_IRAM_CODE_AREA		(TEGRA_IRAM_BASE + SZ_4K)



#define TEGRA_HOST1X_BASE		0x50000000

#define TEGRA_HOST1X_BASE		0x50000000

#define TEGRA_HOST1X_SIZE		0x24000

#define TEGRA_HOST1X_SIZE		0x24000

arch/arm/mach-tegra/irammap.h

+6 −0
Original line number Original line Diff line number Diff line
@@ -23,4 +23,10 @@ 
#define TEGRA_IRAM_RESET_HANDLER_OFFSET	0

#define TEGRA_IRAM_RESET_HANDLER_OFFSET	0

#define TEGRA_IRAM_RESET_HANDLER_SIZE	SZ_1K

#define TEGRA_IRAM_RESET_HANDLER_SIZE	SZ_1K





/*

 * This area is used for LPx resume vector, only while LPx power state is

 * active. At other times, the AVP may use this area for arbitrary purposes

 */

#define TEGRA_IRAM_LPx_RESUME_AREA	(TEGRA_IRAM_BASE + SZ_4K)



#endif
 
#endif

arch/arm/mach-tegra/pm.c

+4 −4
Original line number Original line Diff line number Diff line
@@ -263,10 +263,10 @@ static void tegra_suspend_enter_lp1(void) 
	tegra_pmc_suspend();

	tegra_pmc_suspend();





	/* copy the reset vector & SDRAM shutdown code into IRAM */

	/* copy the reset vector & SDRAM shutdown code into IRAM */

	memcpy(iram_save_addr, IO_ADDRESS(TEGRA_IRAM_CODE_AREA),

	memcpy(iram_save_addr, IO_ADDRESS(TEGRA_IRAM_LPx_RESUME_AREA),

		iram_save_size);

	memcpy(IO_ADDRESS(TEGRA_IRAM_CODE_AREA), tegra_lp1_iram.start_addr,

		iram_save_size);

		iram_save_size);

	memcpy(IO_ADDRESS(TEGRA_IRAM_LPx_RESUME_AREA),

		tegra_lp1_iram.start_addr, iram_save_size);





	*((u32 *)tegra_cpu_lp1_mask) = 1;

	*((u32 *)tegra_cpu_lp1_mask) = 1;

}

}
@@ -276,7 +276,7 @@ static void tegra_suspend_exit_lp1(void) 
	tegra_pmc_resume();

	tegra_pmc_resume();





	/* restore IRAM */

	/* restore IRAM */

	memcpy(IO_ADDRESS(TEGRA_IRAM_CODE_AREA), iram_save_addr,

	memcpy(IO_ADDRESS(TEGRA_IRAM_LPx_RESUME_AREA), iram_save_addr,

		iram_save_size);

		iram_save_size);





	*(u32 *)tegra_cpu_lp1_mask = 0;

	*(u32 *)tegra_cpu_lp1_mask = 0;

arch/arm/mach-tegra/reset.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -82,7 +82,7 @@ void __init tegra_cpu_reset_handler_init(void) 




#ifdef CONFIG_PM_SLEEP

#ifdef CONFIG_PM_SLEEP

	__tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_LP1] =

	__tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_LP1] =

		TEGRA_IRAM_CODE_AREA;

		TEGRA_IRAM_LPx_RESUME_AREA;

	__tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_LP2] =

	__tegra_cpu_reset_handler_data[TEGRA_RESET_STARTUP_LP2] =

		virt_to_phys((void *)tegra_resume);

		virt_to_phys((void *)tegra_resume);

#endif

#endif

arch/arm/mach-tegra/sleep-tegra20.S

+3 −2
Original line number Original line Diff line number Diff line
@@ -25,6 +25,7 @@ 
#include <asm/cp15.h>

#include <asm/cp15.h>

#include <asm/cache.h>

#include <asm/cache.h>





#include "irammap.h"

#include "sleep.h"

#include "sleep.h"

#include "flowctrl.h"

#include "flowctrl.h"
@@ -235,7 +236,7 @@ ENTRY(tegra20_sleep_core_finish) 
	mov32	r0, tegra20_tear_down_core

	mov32	r0, tegra20_tear_down_core

	mov32	r1, tegra20_iram_start

	mov32	r1, tegra20_iram_start

	sub	r0, r0, r1

	sub	r0, r0, r1

	mov32	r1, TEGRA_IRAM_CODE_AREA

	mov32	r1, TEGRA_IRAM_LPx_RESUME_AREA

	add	r0, r0, r1

	add	r0, r0, r1





	mov	pc, r3

	mov	pc, r3
@@ -328,7 +329,7 @@ tegra20_iram_start: 
 * The physical address of tegra_resume expected to be stored in

 * The physical address of tegra_resume expected to be stored in

 * PMC_SCRATCH41.

 * PMC_SCRATCH41.

 *

 *

 * NOTE: THIS *MUST* BE RELOCATED TO TEGRA_IRAM_CODE_AREA.

 * NOTE: THIS *MUST* BE RELOCATED TO TEGRA_IRAM_LPx_RESUME_AREA.

 */

 */

ENTRY(tegra20_lp1_reset)

ENTRY(tegra20_lp1_reset)

	/*

	/*