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Commit fcf5dfda authored by Miaoqing Pan's avatar Miaoqing Pan Committed by Kalle Valo
Browse files

ath9k: Update AR9580 initvals 



HW peak detect calibration would fail for AR9300 chips and
we went for implementing the SW way of doing it instead of
HW doing the peak detect calibration.

Signed-off-by: default avatarMiaoqing Pan <miaoqing@codeaurora.org>
Signed-off-by: default avatarKalle Valo <kvalo@qca.qualcomm.com>
parent 628bb705

drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h

+2 −2
Original line number Original line Diff line number Diff line
@@ -1290,7 +1290,7 @@ static const u32 ar9580_1p0_baseband_postamble[][5] = { 
	{0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},

	{0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},

	{0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},

	{0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},

	{0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},

	{0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},

	{0x00009e3c, 0xcf946220, 0xcf946220, 0xcf946222, 0xcf946222},

	{0x00009e3c, 0xcf946220, 0xcf946220, 0xcf946220, 0xcf946220},

	{0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27},

	{0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27},

	{0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},

	{0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012},

	{0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},

	{0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
@@ -1310,7 +1310,7 @@ static const u32 ar9580_1p0_baseband_postamble[][5] = { 
	{0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},

	{0x0000a284, 0x00000000, 0x00000000, 0x00000150, 0x00000150},

	{0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},

	{0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},

	{0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},

	{0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},

	{0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},

	{0x0000a2c4, 0x00058d18, 0x00058d18, 0x00058d18, 0x00058d18},

	{0x0000a2d0, 0x00041983, 0x00041983, 0x00041981, 0x00041982},

	{0x0000a2d0, 0x00041983, 0x00041983, 0x00041981, 0x00041982},

	{0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},

	{0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},

	{0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},

	{0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},