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Commit faa9a083 authored by Mark Rutland's avatar Mark Rutland Committed by Catalin Marinas
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arm64: pmuv3: handle pmuv3+ 



Commit f1b36dcb ("arm64: pmuv3: handle !PMUv3 when probing") is
a little too restrictive, and prevents the use of of backwards
compatible PMUv3 extenstions, which have a PMUver value other than 1.

For instance, ARMv8.1 PMU extensions (as implemented by ThunderX2) are
reported with PMUver value 4.

Per the usual ID register principles, at least 0x1-0x7 imply a
PMUv3-compatible PMU. It's not currently clear whether 0x8-0xe imply the
same.

For the time being, treat the value as signed, and with 0x1-0x7 treated
as meaning PMUv3 is implemented. This may be relaxed by future patches.

Reported-by: default avatarJayachandran C <jnair@caviumnetworks.com>
Tested-by: default avatarJayachandran C <jnair@caviumnetworks.com>
Acked-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 9842119a

arch/arm64/kernel/perf_event.c

+4 −3
Original line number Original line Diff line number Diff line
@@ -966,13 +966,14 @@ static void __armv8pmu_probe_pmu(void *info) 
{

{

	struct armv8pmu_probe_info *probe = info;

	struct armv8pmu_probe_info *probe = info;

	struct arm_pmu *cpu_pmu = probe->pmu;

	struct arm_pmu *cpu_pmu = probe->pmu;

	u64 dfr0, pmuver;

	u64 dfr0;

	u32 pmceid[2];

	u32 pmceid[2];

	int pmuver;





	dfr0 = read_sysreg(id_aa64dfr0_el1);

	dfr0 = read_sysreg(id_aa64dfr0_el1);

	pmuver = cpuid_feature_extract_unsigned_field(dfr0,

	pmuver = cpuid_feature_extract_signed_field(dfr0,

			ID_AA64DFR0_PMUVER_SHIFT);

			ID_AA64DFR0_PMUVER_SHIFT);

	if (pmuver != 1)

	if (pmuver < 1)

		return;

		return;





	probe->present = true;

	probe->present = true;