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Commit fa2edcfb authored by Pankaj Bansal's avatar Pankaj Bansal Committed by Marc Kleine-Budde
Browse files

arm: dts: Add nodes for flexcan devices present on LS1021A-Rev2 SoC 



This patch adds the device nodes for flexcan controller(s) present on
LS1021A-Rev2 SoC.

Signed-off-by: default avatarPankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: default avatarBhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: default avatarSakar Arora <Sakar.Arora@freescale.com>
Reviewed-by: default avatarZhengxiong Jin <Jason.Jin@freescale.com>
Reviewed-by: default avatarPoonam Aggrwal <poonam.aggrwal@nxp.com>
Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parent d50f4630

arch/arm/boot/dts/ls1021a-qds.dts

+16 −0
Original line number Original line Diff line number Diff line
@@ -331,3 +331,19 @@ 
&uart1 {

&uart1 {

	status = "okay";

	status = "okay";

};

};



&can0 {

	status = "okay";

};



&can1 {

	status = "okay";

};



&can2 {

	status = "disabled";

};



&can3 {

	status = "disabled";

};

arch/arm/boot/dts/ls1021a-twr.dts

+16 −0
Original line number Original line Diff line number Diff line
@@ -243,3 +243,19 @@ 
&uart1 {

&uart1 {

	status = "okay";

	status = "okay";

};

};



&can0 {

	status = "okay";

};



&can1 {

	status = "okay";

};



&can2 {

	status = "disabled";

};



&can3 {

	status = "disabled";

};

arch/arm/boot/dts/ls1021a.dtsi

+36 −0
Original line number Original line Diff line number Diff line
@@ -730,5 +730,41 @@ 
					<0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,

					<0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,

					<0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;

					<0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;

		};

		};



		can0: can@2a70000 {

			compatible = "fsl,ls1021ar2-flexcan";

			reg = <0x0 0x2a70000 0x0 0x1000>;

			interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 1>, <&clockgen 4 1>;

			clock-names = "ipg", "per";

			big-endian;

		};



		can1: can@2a80000 {

			compatible = "fsl,ls1021ar2-flexcan";

			reg = <0x0 0x2a80000 0x0 0x1000>;

			interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 1>, <&clockgen 4 1>;

			clock-names = "ipg", "per";

			big-endian;

		};



		can2: can@2a90000 {

			compatible = "fsl,ls1021ar2-flexcan";

			reg = <0x0 0x2a90000 0x0 0x1000>;

			interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 1>, <&clockgen 4 1>;

			clock-names = "ipg", "per";

			big-endian;

		};



		can3: can@2aa0000 {

			compatible = "fsl,ls1021ar2-flexcan";

			reg = <0x0 0x2aa0000 0x0 0x1000>;

			interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clockgen 4 1>, <&clockgen 4 1>;

			clock-names = "ipg", "per";

			big-endian;

		};

	};

	};

};
 
};