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Commit f9fdffa5 authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/radeon: fix cayman_vm_set_page v2 



Handle requests that won't fit into a single packet.

v2: pe needs to increase as well.

Signed-off-by: default avatarChristian König <deathsimple@vodafone.de>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 58f8cf56

drivers/gpu/drm/radeon/ni.c

+23 −18
Original line number Diff line number Diff line
@@ -1538,12 +1538,16 @@ void cayman_vm_set_page(struct radeon_device *rdev, uint64_t pe, 
{

	struct radeon_ring *ring = &rdev->ring[rdev->asic->vm.pt_ring_index];

	uint32_t r600_flags = cayman_vm_page_flags(rdev, flags);

	int i;



	radeon_ring_write(ring, PACKET3(PACKET3_ME_WRITE, 1 + count * 2));

	while (count) {

		unsigned ndw = 1 + count * 2;

		if (ndw > 0x3FFF)

			ndw = 0x3FFF;



		radeon_ring_write(ring, PACKET3(PACKET3_ME_WRITE, ndw));

		radeon_ring_write(ring, pe);

		radeon_ring_write(ring, upper_32_bits(pe) & 0xff);

	for (i = 0; i < count; ++i) {

		for (; ndw > 1; ndw -= 2, --count, pe += 8) {

			uint64_t value = 0;

			if (flags & RADEON_VM_PAGE_SYSTEM) {

				value = radeon_vm_map_gart(rdev, addr);
@@ -1560,6 +1564,7 @@ void cayman_vm_set_page(struct radeon_device *rdev, uint64_t pe, 
			radeon_ring_write(ring, upper_32_bits(value));

		}

	}

}



/**

 * cayman_vm_flush - vm flush using the CP