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Commit f9a9f096 authored by Lutz Ballaschke's avatar Lutz Ballaschke Committed by Wim Van Sebroeck
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watchdog: clean-up f71808e_wdt.c



Cleaned up and replaced some magic numbers by constants.

Signed-off-by: default avatarLutz Ballaschke <vegan.grindcore@googlemail.com>
Signed-off-by: default avatarWim Van Sebroeck <wim@iguana.be>
parent 4162cf64
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+11 −10
Original line number Original line Diff line number Diff line
@@ -42,6 +42,9 @@
#define SIO_REG_DEVID		0x20	/* Device ID (2 bytes) */
#define SIO_REG_DEVID		0x20	/* Device ID (2 bytes) */
#define SIO_REG_DEVREV		0x22	/* Device revision */
#define SIO_REG_DEVREV		0x22	/* Device revision */
#define SIO_REG_MANID		0x23	/* Fintek ID (2 bytes) */
#define SIO_REG_MANID		0x23	/* Fintek ID (2 bytes) */
#define SIO_REG_MFUNCT1		0x29	/* Multi function select 1 */
#define SIO_REG_MFUNCT2		0x2a	/* Multi function select 2 */
#define SIO_REG_MFUNCT3		0x2b	/* Multi function select 3 */
#define SIO_REG_ENABLE		0x30	/* Logical device enable */
#define SIO_REG_ENABLE		0x30	/* Logical device enable */
#define SIO_REG_ADDR		0x60	/* Logical device address (2 bytes) */
#define SIO_REG_ADDR		0x60	/* Logical device address (2 bytes) */


@@ -52,8 +55,6 @@
#define SIO_F71882_ID		0x0541	/* Chipset ID */
#define SIO_F71882_ID		0x0541	/* Chipset ID */
#define SIO_F71889_ID		0x0723	/* Chipset ID */
#define SIO_F71889_ID		0x0723	/* Chipset ID */


#define	F71882FG_REG_START		0x01

#define F71808FG_REG_WDO_CONF		0xf0
#define F71808FG_REG_WDO_CONF		0xf0
#define F71808FG_REG_WDT_CONF		0xf5
#define F71808FG_REG_WDT_CONF		0xf5
#define F71808FG_REG_WD_TIME		0xf6
#define F71808FG_REG_WD_TIME		0xf6
@@ -76,7 +77,7 @@ module_param(force_id, ushort, 0);
MODULE_PARM_DESC(force_id, "Override the detected device ID");
MODULE_PARM_DESC(force_id, "Override the detected device ID");


static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
static int timeout = 60;	/* default timeout in seconds */
static int timeout = WATCHDOG_TIMEOUT;	/* default timeout in seconds */
module_param(timeout, int, 0);
module_param(timeout, int, 0);
MODULE_PARM_DESC(timeout,
MODULE_PARM_DESC(timeout,
	"Watchdog timeout in seconds. 1<= timeout <="
	"Watchdog timeout in seconds. 1<= timeout <="
@@ -299,19 +300,19 @@ static int watchdog_start(void)
	switch (watchdog.type) {
	switch (watchdog.type) {
	case f71808fg:
	case f71808fg:
		/* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
		/* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
		superio_clear_bit(watchdog.sioaddr, 0x2a, 3);
		superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT2, 3);
		superio_clear_bit(watchdog.sioaddr, 0x2b, 3);
		superio_clear_bit(watchdog.sioaddr, SIO_REG_MFUNCT3, 3);
		break;
		break;


	case f71882fg:
	case f71882fg:
		/* Set pin 56 to WDTRST# */
		/* Set pin 56 to WDTRST# */
		superio_set_bit(watchdog.sioaddr, 0x29, 1);
		superio_set_bit(watchdog.sioaddr, SIO_REG_MFUNCT1, 1);
		break;
		break;


	case f71889fg:
	case f71889fg:
		/* set pin 40 to WDTRST# */
		/* set pin 40 to WDTRST# */
		superio_outb(watchdog.sioaddr, 0x2b,
		superio_outb(watchdog.sioaddr, SIO_REG_MFUNCT3,
				superio_inb(watchdog.sioaddr, 0x2b) & 0xcf);
			superio_inb(watchdog.sioaddr, SIO_REG_MFUNCT3) & 0xcf);
		break;
		break;


	default:
	default: