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Commit f8a4c11b authored by Baoyou Xie's avatar Baoyou Xie Committed by Alex Deucher
Browse files

drm/amd/powerplay: mark symbols static where possible 



We get a few warnings when building kernel with W=1:
drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/fiji_smumgr.c:162:5: warning: no previous prototype for 'fiji_setup_pwr_virus' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/fiji_smc.c:2052:5: warning: no previous prototype for 'fiji_program_mem_timing_parameters' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../powerplay/smumgr/polaris10_smumgr.c:175:5: warning: no previous prototype for 'polaris10_avfs_event_mgr' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/cz_hwmgr.c:69:10: warning: no previous prototype for 'cz_get_eclk_level' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/smu7_hwmgr.c:92:26: warning: no previous prototype for 'cast_phw_smu7_power_state' [-Wmissing-prototypes]
....

In fact, these functions are only used in the file in which they are
declared and don't need a declaration, but can be made static.
So this patch marks these functions with 'static'.

Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarBaoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 22e5808e

drivers/gpu/drm/amd/powerplay/amd_powerplay.c

+3 −2
Original line number Original line Diff line number Diff line
@@ -436,7 +436,8 @@ static enum PP_StateUILabel power_state_convert(enum amd_pm_state_type state) 
	}

	}

}

}





int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id, void *input, void *output)

static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id,

		void *input, void *output)

{

{

	int ret = 0;

	int ret = 0;

	struct pp_instance *pp_handle;

	struct pp_instance *pp_handle;
@@ -475,7 +476,7 @@ int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_event event_id, void *input, 
	return ret;

	return ret;

}

}





enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle)

static enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle)

{

{

	struct pp_hwmgr *hwmgr;

	struct pp_hwmgr *hwmgr;

	struct pp_power_state *state;

	struct pp_power_state *state;

drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c

+6 −6
Original line number Original line Diff line number Diff line
@@ -66,7 +66,7 @@ static const struct cz_power_state *cast_const_PhwCzPowerState( 
	return (struct cz_power_state *)hw_ps;

	return (struct cz_power_state *)hw_ps;

}

}





uint32_t cz_get_eclk_level(struct pp_hwmgr *hwmgr,

static uint32_t cz_get_eclk_level(struct pp_hwmgr *hwmgr,

					uint32_t clock, uint32_t msg)

					uint32_t clock, uint32_t msg)

{

{

	int i = 0;

	int i = 0;
@@ -1017,7 +1017,7 @@ static int cz_tf_program_bootup_state(struct pp_hwmgr *hwmgr, void *input, 
	return 0;

	return 0;

}

}





int cz_tf_reset_acp_boot_level(struct pp_hwmgr *hwmgr, void *input,

static int cz_tf_reset_acp_boot_level(struct pp_hwmgr *hwmgr, void *input,

				void *output, void *storage, int result)

				void *output, void *storage, int result)

{

{

	struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);

	struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
@@ -1225,7 +1225,7 @@ static int cz_hwmgr_backend_fini(struct pp_hwmgr *hwmgr) 
	return 0;

	return 0;

}

}





int cz_phm_force_dpm_highest(struct pp_hwmgr *hwmgr)

static int cz_phm_force_dpm_highest(struct pp_hwmgr *hwmgr)

{

{

	struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);

	struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
@@ -1239,7 +1239,7 @@ int cz_phm_force_dpm_highest(struct pp_hwmgr *hwmgr) 
	return 0;

	return 0;

}

}





int cz_phm_unforce_dpm_levels(struct pp_hwmgr *hwmgr)

static int cz_phm_unforce_dpm_levels(struct pp_hwmgr *hwmgr)

{

{

	struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);

	struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);

	struct phm_clock_voltage_dependency_table *table =

	struct phm_clock_voltage_dependency_table *table =
@@ -1277,7 +1277,7 @@ int cz_phm_unforce_dpm_levels(struct pp_hwmgr *hwmgr) 
	return 0;

	return 0;

}

}





int cz_phm_force_dpm_lowest(struct pp_hwmgr *hwmgr)

static int cz_phm_force_dpm_lowest(struct pp_hwmgr *hwmgr)

{

{

	struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);

	struct cz_hwmgr *cz_hwmgr = (struct cz_hwmgr *)(hwmgr->backend);
@@ -1533,7 +1533,7 @@ static int cz_dpm_get_pp_table_entry(struct pp_hwmgr *hwmgr, 
	return result;

	return result;

}

}





int cz_get_power_state_size(struct pp_hwmgr *hwmgr)

static int cz_get_power_state_size(struct pp_hwmgr *hwmgr)

{

{

	return sizeof(struct cz_power_state);

	return sizeof(struct cz_power_state);

}

}

drivers/gpu/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

+3 −3
Original line number Original line Diff line number Diff line
@@ -131,7 +131,7 @@ static int set_platform_caps(struct pp_hwmgr *hwmgr, uint32_t powerplay_caps) 
/**

/**

 * Private Function to get the PowerPlay Table Address.

 * Private Function to get the PowerPlay Table Address.

 */

 */

const void *get_powerplay_table(struct pp_hwmgr *hwmgr)

static const void *get_powerplay_table(struct pp_hwmgr *hwmgr)

{

{

	int index = GetIndexIntoMasterTable(DATA, PowerPlayInfo);

	int index = GetIndexIntoMasterTable(DATA, PowerPlayInfo);
@@ -1049,7 +1049,7 @@ static int check_powerplay_tables( 
	return 0;

	return 0;

}

}





int pp_tables_v1_0_initialize(struct pp_hwmgr *hwmgr)

static int pp_tables_v1_0_initialize(struct pp_hwmgr *hwmgr)

{

{

	int result = 0;

	int result = 0;

	const ATOM_Tonga_POWERPLAYTABLE *powerplay_table;

	const ATOM_Tonga_POWERPLAYTABLE *powerplay_table;
@@ -1100,7 +1100,7 @@ int pp_tables_v1_0_initialize(struct pp_hwmgr *hwmgr) 
	return result;

	return result;

}

}





int pp_tables_v1_0_uninitialize(struct pp_hwmgr *hwmgr)

static int pp_tables_v1_0_uninitialize(struct pp_hwmgr *hwmgr)

{

{

	struct phm_ppt_v1_information *pp_table_information =

	struct phm_ppt_v1_information *pp_table_information =

		(struct phm_ppt_v1_information *)(hwmgr->pptable);

		(struct phm_ppt_v1_information *)(hwmgr->pptable);

drivers/gpu/drm/amd/powerplay/hwmgr/processpptables.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -1507,7 +1507,7 @@ static int init_phase_shedding_table(struct pp_hwmgr *hwmgr, 
	return 0;

	return 0;

}

}





int get_number_of_vce_state_table_entries(

static int get_number_of_vce_state_table_entries(

						  struct pp_hwmgr *hwmgr)

						  struct pp_hwmgr *hwmgr)

{

{

	const ATOM_PPLIB_POWERPLAYTABLE *table =

	const ATOM_PPLIB_POWERPLAYTABLE *table =
@@ -1521,7 +1521,7 @@ int get_number_of_vce_state_table_entries( 
	return 0;

	return 0;

}

}





int get_vce_state_table_entry(struct pp_hwmgr *hwmgr,

static int get_vce_state_table_entry(struct pp_hwmgr *hwmgr,

							unsigned long i,

							unsigned long i,

							struct pp_vce_state *vce_state,

							struct pp_vce_state *vce_state,

							void **clock_info,

							void **clock_info,

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c

+5 −5
Original line number Original line Diff line number Diff line
@@ -75,7 +75,7 @@ int smu7_powerdown_uvd(struct pp_hwmgr *hwmgr) 
	return 0;

	return 0;

}

}





int smu7_powerup_uvd(struct pp_hwmgr *hwmgr)

static int smu7_powerup_uvd(struct pp_hwmgr *hwmgr)

{

{

	if (phm_cf_want_uvd_power_gating(hwmgr)) {

	if (phm_cf_want_uvd_power_gating(hwmgr)) {

		if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,

		if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
@@ -91,7 +91,7 @@ int smu7_powerup_uvd(struct pp_hwmgr *hwmgr) 
	return 0;

	return 0;

}

}





int smu7_powerdown_vce(struct pp_hwmgr *hwmgr)

static int smu7_powerdown_vce(struct pp_hwmgr *hwmgr)

{

{

	if (phm_cf_want_vce_power_gating(hwmgr))

	if (phm_cf_want_vce_power_gating(hwmgr))

		return smum_send_msg_to_smc(hwmgr->smumgr,

		return smum_send_msg_to_smc(hwmgr->smumgr,
@@ -99,7 +99,7 @@ int smu7_powerdown_vce(struct pp_hwmgr *hwmgr) 
	return 0;

	return 0;

}

}





int smu7_powerup_vce(struct pp_hwmgr *hwmgr)

static int smu7_powerup_vce(struct pp_hwmgr *hwmgr)

{

{

	if (phm_cf_want_vce_power_gating(hwmgr))

	if (phm_cf_want_vce_power_gating(hwmgr))

		return smum_send_msg_to_smc(hwmgr->smumgr,

		return smum_send_msg_to_smc(hwmgr->smumgr,
@@ -107,7 +107,7 @@ int smu7_powerup_vce(struct pp_hwmgr *hwmgr) 
	return 0;

	return 0;

}

}





int smu7_powerdown_samu(struct pp_hwmgr *hwmgr)

static int smu7_powerdown_samu(struct pp_hwmgr *hwmgr)

{

{

	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,

	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,

			PHM_PlatformCaps_SamuPowerGating))

			PHM_PlatformCaps_SamuPowerGating))
@@ -116,7 +116,7 @@ int smu7_powerdown_samu(struct pp_hwmgr *hwmgr) 
	return 0;

	return 0;

}

}





int smu7_powerup_samu(struct pp_hwmgr *hwmgr)

static int smu7_powerup_samu(struct pp_hwmgr *hwmgr)

{

{

	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,

	if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,

			PHM_PlatformCaps_SamuPowerGating))

			PHM_PlatformCaps_SamuPowerGating))