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Commit f875a832 authored by Paul Burton's avatar Paul Burton Committed by Ralf Baechle
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MIPS: Abstract CPU core & VP(E) ID access through accessor functions



We currently have fields in struct cpuinfo_mips for the core & VP(E) ID
of a particular CPU, and various pieces of code directly access those
fields. This patch abstracts such access by introducing accessor
functions cpu_core(), cpu_set_core(), cpu_vpe_id() & cpu_set_vpe_id()
and having code that needs to access these values call those functions
rather than directly accessing the struct cpuinfo_mips fields. This
prepares us for changes to the way in which those values are stored in
later patches.

The cpu_vpe_id() function is introduced even though we already had a
cpu_vpe_id() macro for a couple of reasons:

  1) It's more consistent with the core, and future cluster, accessors.

  2) It ensures a sensible return type without explicit casts.

  3) It's generally preferable to use functions rather than macros.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17009/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 15e6529f
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+24 −3
Original line number Diff line number Diff line
@@ -144,11 +144,32 @@ struct proc_cpuinfo_notifier_args {
	unsigned long n;
};

static inline unsigned int cpu_core(struct cpuinfo_mips *cpuinfo)
{
	return cpuinfo->core;
}

static inline void cpu_set_core(struct cpuinfo_mips *cpuinfo,
				unsigned int core)
{
	cpuinfo->core = core;
}

static inline unsigned int cpu_vpe_id(struct cpuinfo_mips *cpuinfo)
{
#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_CPU_MIPSR6)
# define cpu_vpe_id(cpuinfo)	((cpuinfo)->vpe_id)
#else
# define cpu_vpe_id(cpuinfo)	({ (void)cpuinfo; 0; })
	return cpuinfo->vpe_id;
#endif
	return 0;
}

static inline void cpu_set_vpe_id(struct cpuinfo_mips *cpuinfo,
				  unsigned int vpe)
{
#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_CPU_MIPSR6)
	cpuinfo->vpe_id = vpe;
#endif
}

static inline unsigned long cpu_asid_inc(void)
{
+1 −1
Original line number Diff line number Diff line
@@ -428,7 +428,7 @@ static inline unsigned int mips_cm_max_vp_width(void)
 */
static inline unsigned int mips_cm_vp_id(unsigned int cpu)
{
	unsigned int core = cpu_data[cpu].core;
	unsigned int core = cpu_core(&cpu_data[cpu]);
	unsigned int vp = cpu_vpe_id(&cpu_data[cpu]);

	return (core * mips_cm_max_vp_width()) + vp;
+1 −1
Original line number Diff line number Diff line
@@ -13,7 +13,7 @@

#ifdef CONFIG_SMP
#define topology_physical_package_id(cpu)	(cpu_data[cpu].package)
#define topology_core_id(cpu)			(cpu_data[cpu].core)
#define topology_core_id(cpu)			(cpu_core(&cpu_data[cpu]))
#define topology_core_cpumask(cpu)		(&cpu_core_map[cpu])
#define topology_sibling_cpumask(cpu)		(&cpu_sibling_map[cpu])
#endif
+5 −2
Original line number Diff line number Diff line
@@ -919,9 +919,12 @@ static void decode_configs(struct cpuinfo_mips *c)

#ifndef CONFIG_MIPS_CPS
	if (cpu_has_mips_r2_r6) {
		c->core = get_ebase_cpunum();
		unsigned int core;

		core = get_ebase_cpunum();
		if (cpu_has_mipsmt)
			c->core >>= fls(core_nvpes()) - 1;
			core >>= fls(core_nvpes()) - 1;
		cpu_set_core(c, core);
	}
#endif
}
+2 −2
Original line number Diff line number Diff line
@@ -287,7 +287,7 @@ void mips_cm_lock_other(unsigned int core, unsigned int vp)
		 * CM 2.5 & older, so have to ensure other VP(E)s don't
		 * race with us.
		 */
		curr_core = current_cpu_data.core;
		curr_core = cpu_core(&current_cpu_data);
		spin_lock_irqsave(&per_cpu(cm_core_lock, curr_core),
				  per_cpu(cm_core_lock_flags, curr_core));

@@ -308,7 +308,7 @@ void mips_cm_unlock_other(void)
	unsigned int curr_core;

	if (mips_cm_revision() < CM_REV_CM3) {
		curr_core = current_cpu_data.core;
		curr_core = cpu_core(&current_cpu_data);
		spin_unlock_irqrestore(&per_cpu(cm_core_lock, curr_core),
				       per_cpu(cm_core_lock_flags, curr_core));
	} else {
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