Loading Documentation/powerpc/dts-bindings/xilinx.txt +1 −1 Original line number Original line Diff line number Diff line Loading @@ -11,7 +11,7 @@ control how the core is synthesized. Historically, the EDK tool would control how the core is synthesized. Historically, the EDK tool would extract the device parameters relevant to device drivers and copy them extract the device parameters relevant to device drivers and copy them into an 'xparameters.h' in the form of #define symbols. This tells the into an 'xparameters.h' in the form of #define symbols. This tells the device drivers how the IP cores are configured, but it requres the kernel device drivers how the IP cores are configured, but it requires the kernel to be recompiled every time the FPGA bitstream is resynthesized. to be recompiled every time the FPGA bitstream is resynthesized. The new approach is to export the parameters into the device tree and The new approach is to export the parameters into the device tree and Loading arch/mips/sibyte/bcm1480/irq.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -254,7 +254,7 @@ void __init init_bcm1480_irqs(void) * On the second cpu, everything is set to IP5, which is * On the second cpu, everything is set to IP5, which is * ignored, EXCEPT the mailbox interrupt. That one is * ignored, EXCEPT the mailbox interrupt. That one is * set to IP[2] so it is handled. This is needed so we * set to IP[2] so it is handled. This is needed so we * can do cross-cpu function calls, as requred by SMP * can do cross-cpu function calls, as required by SMP */ */ #define IMR_IP2_VAL K_BCM1480_INT_MAP_I0 #define IMR_IP2_VAL K_BCM1480_INT_MAP_I0 Loading arch/mips/sibyte/sb1250/irq.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -237,7 +237,7 @@ void __init init_sb1250_irqs(void) * On the second cpu, everything is set to IP5, which is * On the second cpu, everything is set to IP5, which is * ignored, EXCEPT the mailbox interrupt. That one is * ignored, EXCEPT the mailbox interrupt. That one is * set to IP[2] so it is handled. This is needed so we * set to IP[2] so it is handled. This is needed so we * can do cross-cpu function calls, as requred by SMP * can do cross-cpu function calls, as required by SMP */ */ #define IMR_IP2_VAL K_INT_MAP_I0 #define IMR_IP2_VAL K_INT_MAP_I0 Loading crypto/Kconfig +1 −1 Original line number Original line Diff line number Diff line Loading @@ -28,7 +28,7 @@ config CRYPTO_FIPS This options enables the fips boot option which is This options enables the fips boot option which is required if you want to system to operate in a FIPS 200 required if you want to system to operate in a FIPS 200 certification. You should say no unless you know what certification. You should say no unless you know what this is. Note that CRYPTO_ANSI_CPRNG is requred if this this is. Note that CRYPTO_ANSI_CPRNG is required if this option is selected option is selected config CRYPTO_ALGAPI config CRYPTO_ALGAPI Loading drivers/gpu/drm/i915/intel_display.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -904,9 +904,9 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, memset(best_clock, 0, sizeof(*best_clock)); memset(best_clock, 0, sizeof(*best_clock)); max_n = limit->n.max; max_n = limit->n.max; /* based on hardware requriment prefer smaller n to precision */ /* based on hardware requirement, prefer smaller n to precision */ for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) { for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) { /* based on hardware requirment prefere larger m1,m2 */ /* based on hardware requirement, prefere larger m1,m2 */ for (clock.m1 = limit->m1.max; for (clock.m1 = limit->m1.max; clock.m1 >= limit->m1.min; clock.m1--) { clock.m1 >= limit->m1.min; clock.m1--) { for (clock.m2 = limit->m2.max; for (clock.m2 = limit->m2.max; Loading Loading
Documentation/powerpc/dts-bindings/xilinx.txt +1 −1 Original line number Original line Diff line number Diff line Loading @@ -11,7 +11,7 @@ control how the core is synthesized. Historically, the EDK tool would control how the core is synthesized. Historically, the EDK tool would extract the device parameters relevant to device drivers and copy them extract the device parameters relevant to device drivers and copy them into an 'xparameters.h' in the form of #define symbols. This tells the into an 'xparameters.h' in the form of #define symbols. This tells the device drivers how the IP cores are configured, but it requres the kernel device drivers how the IP cores are configured, but it requires the kernel to be recompiled every time the FPGA bitstream is resynthesized. to be recompiled every time the FPGA bitstream is resynthesized. The new approach is to export the parameters into the device tree and The new approach is to export the parameters into the device tree and Loading
arch/mips/sibyte/bcm1480/irq.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -254,7 +254,7 @@ void __init init_bcm1480_irqs(void) * On the second cpu, everything is set to IP5, which is * On the second cpu, everything is set to IP5, which is * ignored, EXCEPT the mailbox interrupt. That one is * ignored, EXCEPT the mailbox interrupt. That one is * set to IP[2] so it is handled. This is needed so we * set to IP[2] so it is handled. This is needed so we * can do cross-cpu function calls, as requred by SMP * can do cross-cpu function calls, as required by SMP */ */ #define IMR_IP2_VAL K_BCM1480_INT_MAP_I0 #define IMR_IP2_VAL K_BCM1480_INT_MAP_I0 Loading
arch/mips/sibyte/sb1250/irq.c +1 −1 Original line number Original line Diff line number Diff line Loading @@ -237,7 +237,7 @@ void __init init_sb1250_irqs(void) * On the second cpu, everything is set to IP5, which is * On the second cpu, everything is set to IP5, which is * ignored, EXCEPT the mailbox interrupt. That one is * ignored, EXCEPT the mailbox interrupt. That one is * set to IP[2] so it is handled. This is needed so we * set to IP[2] so it is handled. This is needed so we * can do cross-cpu function calls, as requred by SMP * can do cross-cpu function calls, as required by SMP */ */ #define IMR_IP2_VAL K_INT_MAP_I0 #define IMR_IP2_VAL K_INT_MAP_I0 Loading
crypto/Kconfig +1 −1 Original line number Original line Diff line number Diff line Loading @@ -28,7 +28,7 @@ config CRYPTO_FIPS This options enables the fips boot option which is This options enables the fips boot option which is required if you want to system to operate in a FIPS 200 required if you want to system to operate in a FIPS 200 certification. You should say no unless you know what certification. You should say no unless you know what this is. Note that CRYPTO_ANSI_CPRNG is requred if this this is. Note that CRYPTO_ANSI_CPRNG is required if this option is selected option is selected config CRYPTO_ALGAPI config CRYPTO_ALGAPI Loading
drivers/gpu/drm/i915/intel_display.c +2 −2 Original line number Original line Diff line number Diff line Loading @@ -904,9 +904,9 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, memset(best_clock, 0, sizeof(*best_clock)); memset(best_clock, 0, sizeof(*best_clock)); max_n = limit->n.max; max_n = limit->n.max; /* based on hardware requriment prefer smaller n to precision */ /* based on hardware requirement, prefer smaller n to precision */ for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) { for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) { /* based on hardware requirment prefere larger m1,m2 */ /* based on hardware requirement, prefere larger m1,m2 */ for (clock.m1 = limit->m1.max; for (clock.m1 = limit->m1.max; clock.m1 >= limit->m1.min; clock.m1--) { clock.m1 >= limit->m1.min; clock.m1--) { for (clock.m2 = limit->m2.max; for (clock.m2 = limit->m2.max; Loading