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Commit f658f21c authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
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Merge branch 'scif-clk-sck-brg-for-v4.5' of... 

Merge branch 'scif-clk-sck-brg-for-v4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into tty-next

Geert writes:

Summary:
  - Clean up the naming of clocks in the sh-sci driver and its DT bindings,
  - Add support for the optional external clock on (H)SCI(F), where this pin
    can serve as a clock input,
  - Add support for the optional clock sources for the Baud Rate
    Generator for External Clock (BRG), as found on some SCIF variants
    and on HSCIF.
parents c93a5993 192d367f

Documentation/devicetree/bindings/serial/renesas,sci-serial.txt

+26 −6
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ 


Required properties:



  - compatible: Must contain one of the following:

  - compatible: Must contain one or more of the following:



    - "renesas,scif-r7s72100" for R7S72100 (RZ/A1H) SCIF compatible UART.

    - "renesas,scifa-r8a73a4" for R8A73A4 (R-Mobile APE6) SCIFA compatible UART.
@@ -31,6 +31,14 @@ Required properties: 
    - "renesas,hscif-r8a7795" for R8A7795 (R-Car H3) HSCIF compatible UART.

    - "renesas,scifa-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFA compatible UART.

    - "renesas,scifb-sh73a0" for SH73A0 (SH-Mobile AG5) SCIFB compatible UART.

    - "renesas,rcar-gen1-scif" for R-Car Gen1 SCIF compatible UART,

    - "renesas,rcar-gen2-scif" for R-Car Gen2 SCIF compatible UART,

    - "renesas,rcar-gen3-scif" for R-Car Gen3 SCIF compatible UART,

    - "renesas,rcar-gen2-scifa" for R-Car Gen2 SCIFA compatible UART,

    - "renesas,rcar-gen2-scifb" for R-Car Gen2 SCIFB compatible UART,

    - "renesas,rcar-gen1-hscif" for R-Car Gen1 HSCIF compatible UART,

    - "renesas,rcar-gen2-hscif" for R-Car Gen2 HSCIF compatible UART,

    - "renesas,rcar-gen3-hscif" for R-Car Gen3 HSCIF compatible UART,

    - "renesas,scif" for generic SCIF compatible UART.

    - "renesas,scifa" for generic SCIFA compatible UART.

    - "renesas,scifb" for generic SCIFB compatible UART.
@@ -38,15 +46,26 @@ Required properties: 
    - "renesas,sci" for generic SCI compatible UART.



    When compatible with the generic version, nodes must list the

    SoC-specific version corresponding to the platform first followed by the

    generic version.

    SoC-specific version corresponding to the platform first, followed by the

    family-specific and/or generic versions.



  - reg: Base address and length of the I/O registers used by the UART.

  - interrupts: Must contain an interrupt-specifier for the SCIx interrupt.



  - clocks: Must contain a phandle and clock-specifier pair for each entry

    in clock-names.

  - clock-names: Must contain "sci_ick" for the SCIx UART interface clock.

  - clock-names: Must contain "fck" for the SCIx UART functional clock.

    Apart from the divided functional clock, there may be other possible

    sources for the sampling clock, depending on SCIx variant.

    On (H)SCI(F) and some SCIFA, an additional clock may be specified:

      - "hsck" for the optional external clock input (on HSCIF),

      - "sck" for the optional external clock input (on other variants).

    On UARTs equipped with a Baud Rate Generator for External Clock (BRG)

    (some SCIF and HSCIF), additional clocks may be specified:

      - "brg_int" for the optional internal clock source for the frequency

	divider (typically the (AXI or SHwy) bus clock),

      - "scif_clk" for the optional external clock source for the frequency

	divider (SCIF_CLK).



Note: Each enabled SCIx UART should have an alias correctly numbered in the

"aliases" node.
@@ -62,12 +81,13 @@ Example: 
	};



	scifa0: serial@e6c40000 {

		compatible = "renesas,scifa-r8a7790", "renesas,scifa";

		compatible = "renesas,scifa-r8a7790",

			     "renesas,rcar-gen2-scifa", "renesas,scifa";

		reg = <0 0xe6c40000 0 64>;

		interrupt-parent = <&gic>;

		interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&mstp2_clks R8A7790_CLK_SCIFA0>;

		clock-names = "sci_ick";

		clock-names = "fck";

		dmas = <&dmac0 0x21>, <&dmac0 0x22>;

		dma-names = "tx", "rx";

	};

arch/sh/kernel/cpu/clock-cpg.c

+0 −1
Original line number Diff line number Diff line
@@ -63,7 +63,6 @@ int __init __deprecated cpg_clk_init(void) 
	clk_add_alias("fck", "sh-mtu2", "peripheral_clk", NULL);

	clk_add_alias("fck", "sh-cmt-16.0", "peripheral_clk", NULL);

	clk_add_alias("fck", "sh-cmt-32.0", "peripheral_clk", NULL);

	clk_add_alias("sci_ick", NULL, "peripheral_clk", NULL);



	return ret;

}

arch/sh/kernel/cpu/sh2a/clock-sh7264.c

+8 −1
Original line number Diff line number Diff line
@@ -115,7 +115,14 @@ static struct clk_lookup lookups[] = { 
	CLKDEV_CON_ID("peripheral_clk", &div4_clks[DIV4_P]),



	/* MSTP clocks */

	CLKDEV_CON_ID("sci_ick", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.3", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.4", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.5", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.6", &mstp_clks[MSTP77]),

	CLKDEV_ICK_ID("fck", "sh-sci.7", &mstp_clks[MSTP77]),

	CLKDEV_CON_ID("vdc3", &mstp_clks[MSTP74]),

	CLKDEV_ICK_ID("fck", "sh-cmt-16.0", &mstp_clks[MSTP72]),

	CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]),

arch/sh/kernel/cpu/sh2a/clock-sh7269.c

+8 −8
Original line number Diff line number Diff line
@@ -150,14 +150,14 @@ static struct clk_lookup lookups[] = { 
	CLKDEV_CON_ID("bus_clk", &div4_clks[DIV4_B]),



	/* MSTP clocks */

	CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP47]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP46]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP45]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP44]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.4", &mstp_clks[MSTP43]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.5", &mstp_clks[MSTP42]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.6", &mstp_clks[MSTP41]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.7", &mstp_clks[MSTP40]),

	CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[MSTP47]),

	CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[MSTP46]),

	CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[MSTP45]),

	CLKDEV_ICK_ID("fck", "sh-sci.3", &mstp_clks[MSTP44]),

	CLKDEV_ICK_ID("fck", "sh-sci.4", &mstp_clks[MSTP43]),

	CLKDEV_ICK_ID("fck", "sh-sci.5", &mstp_clks[MSTP42]),

	CLKDEV_ICK_ID("fck", "sh-sci.6", &mstp_clks[MSTP41]),

	CLKDEV_ICK_ID("fck", "sh-sci.7", &mstp_clks[MSTP40]),

	CLKDEV_ICK_ID("fck", "sh-cmt-16.0", &mstp_clks[MSTP72]),

	CLKDEV_CON_ID("usb0", &mstp_clks[MSTP60]),

	CLKDEV_ICK_ID("fck", "sh-mtu2", &mstp_clks[MSTP35]),

arch/sh/kernel/cpu/sh4a/clock-sh7343.c

+4 −4
Original line number Diff line number Diff line
@@ -232,10 +232,10 @@ static struct clk_lookup lookups[] = { 
	CLKDEV_CON_ID("mfi0", &mstp_clks[MSTP011]),

	CLKDEV_CON_ID("flctl0", &mstp_clks[MSTP010]),



	CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[MSTP007]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[MSTP006]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[MSTP005]),

	CLKDEV_ICK_ID("sci_fck", "sh-sci.3", &mstp_clks[MSTP004]),

	CLKDEV_ICK_ID("fck", "sh-sci.0", &mstp_clks[MSTP007]),

	CLKDEV_ICK_ID("fck", "sh-sci.1", &mstp_clks[MSTP006]),

	CLKDEV_ICK_ID("fck", "sh-sci.2", &mstp_clks[MSTP005]),

	CLKDEV_ICK_ID("fck", "sh-sci.3", &mstp_clks[MSTP004]),



	CLKDEV_CON_ID("sio0", &mstp_clks[MSTP003]),

	CLKDEV_CON_ID("siof0", &mstp_clks[MSTP002]),