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Commit f63c7b48 authored by Oscar Mateo's avatar Oscar Mateo Committed by Mika Kuoppala
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drm/i915/icl: WaEnableStateCacheRedirectToCS



Redirects the state cache to the CS Command buffer section for
performance reasons.

v2: Rebased
v3: Rebased on top of the WA refactoring
v3: Added References (Mika)

References: HSDES#1604325460
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: default avatarOscar Mateo <oscar.mateo@intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1527285939-20113-3-git-send-email-oscar.mateo@intel.com
parent 3c7ab278
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+1 −0
Original line number Original line Diff line number Diff line
@@ -7227,6 +7227,7 @@ enum {
#define  DISABLE_PIXEL_MASK_CAMMING		(1<<14)
#define  DISABLE_PIXEL_MASK_CAMMING		(1<<14)


#define GEN9_SLICE_COMMON_ECO_CHICKEN1		_MMIO(0x731c)
#define GEN9_SLICE_COMMON_ECO_CHICKEN1		_MMIO(0x731c)
#define   GEN11_STATE_CACHE_REDIRECT_TO_CS	(1 << 11)


#define GEN7_L3SQCREG1				_MMIO(0xB010)
#define GEN7_L3SQCREG1				_MMIO(0xB010)
#define  VLV_B0_WA_L3SQCREG1_VALUE		0x00D30000
#define  VLV_B0_WA_L3SQCREG1_VALUE		0x00D30000
+4 −0
Original line number Original line Diff line number Diff line
@@ -470,6 +470,10 @@ static int icl_ctx_workarounds_init(struct drm_i915_private *dev_priv)
		WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
		WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
				  GEN11_TDL_CLOCK_GATING_FIX_DISABLE);
				  GEN11_TDL_CLOCK_GATING_FIX_DISABLE);


	/* WaEnableStateCacheRedirectToCS:icl */
	WA_SET_BIT_MASKED(GEN9_SLICE_COMMON_ECO_CHICKEN1,
			  GEN11_STATE_CACHE_REDIRECT_TO_CS);

	return 0;
	return 0;
}
}