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Commit f4a48d7b authored by Miquel Raynal's avatar Miquel Raynal
Browse files

mtd: rawnand: lpc32xx_slc: convert driver to nand_scan()



Two helpers have been added to the core to do all kind of controller
side configuration/initialization between the detection phase and the
final NAND scan. Implement these hooks so that we can convert the driver
to just use nand_scan() instead of the nand_scan_ident() +
nand_scan_tail() pair.

Signed-off-by: default avatarMiquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: default avatarBoris Brezillon <boris.brezillon@bootlin.com>
parent eef2b13a
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+42 −35
Original line number Diff line number Diff line
@@ -779,6 +779,46 @@ static struct lpc32xx_nand_cfg_slc *lpc32xx_parse_dt(struct device *dev)
	return ncfg;
}

static int lpc32xx_nand_attach_chip(struct nand_chip *chip)
{
	struct mtd_info *mtd = nand_to_mtd(chip);
	struct lpc32xx_nand_host *host = nand_get_controller_data(chip);

	/* OOB and ECC CPU and DMA work areas */
	host->ecc_buf = (uint32_t *)(host->data_buf + LPC32XX_DMA_DATA_SIZE);

	/*
	 * Small page FLASH has a unique OOB layout, but large and huge
	 * page FLASH use the standard layout. Small page FLASH uses a
	 * custom BBT marker layout.
	 */
	if (mtd->writesize <= 512)
		mtd_set_ooblayout(mtd, &lpc32xx_ooblayout_ops);

	/* These sizes remain the same regardless of page size */
	chip->ecc.size = 256;
	chip->ecc.bytes = LPC32XX_SLC_DEV_ECC_BYTES;
	chip->ecc.prepad = 0;
	chip->ecc.postpad = 0;

	/*
	 * Use a custom BBT marker setup for small page FLASH that
	 * won't interfere with the ECC layout. Large and huge page
	 * FLASH use the standard layout.
	 */
	if ((chip->bbt_options & NAND_BBT_USE_FLASH) &&
	    mtd->writesize <= 512) {
		chip->bbt_td = &bbt_smallpage_main_descr;
		chip->bbt_md = &bbt_smallpage_mirror_descr;
	}

	return 0;
}

static const struct nand_controller_ops lpc32xx_nand_controller_ops = {
	.attach_chip = lpc32xx_nand_attach_chip,
};

/*
 * Probe for NAND controller
 */
@@ -884,41 +924,8 @@ static int lpc32xx_nand_probe(struct platform_device *pdev)
	}

	/* Find NAND device */
	res = nand_scan_ident(mtd, 1, NULL);
	if (res)
		goto release_dma;

	/* OOB and ECC CPU and DMA work areas */
	host->ecc_buf = (uint32_t *)(host->data_buf + LPC32XX_DMA_DATA_SIZE);

	/*
	 * Small page FLASH has a unique OOB layout, but large and huge
	 * page FLASH use the standard layout. Small page FLASH uses a
	 * custom BBT marker layout.
	 */
	if (mtd->writesize <= 512)
		mtd_set_ooblayout(mtd, &lpc32xx_ooblayout_ops);

	/* These sizes remain the same regardless of page size */
	chip->ecc.size = 256;
	chip->ecc.bytes = LPC32XX_SLC_DEV_ECC_BYTES;
	chip->ecc.prepad = chip->ecc.postpad = 0;

	/*
	 * Use a custom BBT marker setup for small page FLASH that
	 * won't interfere with the ECC layout. Large and huge page
	 * FLASH use the standard layout.
	 */
	if ((chip->bbt_options & NAND_BBT_USE_FLASH) &&
	    mtd->writesize <= 512) {
		chip->bbt_td = &bbt_smallpage_main_descr;
		chip->bbt_md = &bbt_smallpage_mirror_descr;
	}

	/*
	 * Fills out all the uninitialized function pointers with the defaults
	 */
	res = nand_scan_tail(mtd);
	chip->dummy_controller.ops = &lpc32xx_nand_controller_ops;
	res = nand_scan(mtd, 1);
	if (res)
		goto release_dma;