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Commit f464ff58 authored by Trent Piepho's avatar Trent Piepho Committed by Kumar Gala
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powerpc/85xx: L2 cache size wrong in 8572DS dts



It's 1MB, not 512KB.  Newer U-Boots will fix this entry, but that's no
reason to have the wrong value in the dts.

Signed-off-by: default avatarTrent Piepho <tpiepho@freescale.com>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 7f0f598a
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+1 −1
Original line number Diff line number Diff line
@@ -90,7 +90,7 @@
			compatible = "fsl,mpc8572-l2-cache-controller";
			reg = <0x20000 0x1000>;
			cache-line-size = <32>;	// 32 bytes
			cache-size = <0x80000>;	// L2, 512K
			cache-size = <0x100000>; // L2, 1M
			interrupt-parent = <&mpic>;
			interrupts = <16 2>;
		};