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Commit f32a10df authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mmc-v4.8-rc6' of git://git.linaro.org/people/ulf.hansson/mmc 

Pull MMC fixes from Ulf Hansson:
 "MMC host:
   - omap/omap_hsmmc: Initialize dma_slave_config to avoid random data
   - sdhci-st: Handle interconnect clock"

* tag 'mmc-v4.8-rc6' of git://git.linaro.org/people/ulf.hansson/mmc:
  mmc: omap: Initialize dma_slave_config to avoid random data in it's fields
  mmc: omap_hsmmc: Initialize dma_slave_config to avoid random data
  mmc: sdhci-st: Handle interconnect clock
  dt-bindings: mmc: sdhci-st: Mention the discretionary "icn" clock
parents baf009f9 df804d5e

Documentation/devicetree/bindings/mmc/sdhci-st.txt

+1 −1
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ Required properties: 
			subsystem (mmcss) inside the FlashSS (available in STiH407 SoC

			family).



- clock-names:		Should be "mmc".

- clock-names:		Should be "mmc" and "icn".  (NB: The latter is not compulsory)

			See: Documentation/devicetree/bindings/resource-names.txt

- clocks:		Phandle to the clock.

			See: Documentation/devicetree/bindings/clock/clock-bindings.txt

drivers/mmc/host/omap.c

+10 −8
Original line number Diff line number Diff line
@@ -1016,14 +1016,16 @@ mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req) 


		/* Only reconfigure if we have a different burst size */

		if (*bp != burst) {

			struct dma_slave_config cfg;



			cfg.src_addr = host->phys_base + OMAP_MMC_REG(host, DATA);

			cfg.dst_addr = host->phys_base + OMAP_MMC_REG(host, DATA);

			cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;

			cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;

			cfg.src_maxburst = burst;

			cfg.dst_maxburst = burst;

			struct dma_slave_config cfg = {

				.src_addr = host->phys_base +

					    OMAP_MMC_REG(host, DATA),

				.dst_addr = host->phys_base +

					    OMAP_MMC_REG(host, DATA),

				.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES,

				.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES,

				.src_maxburst = burst,

				.dst_maxburst = burst,

			};



			if (dmaengine_slave_config(c, &cfg))

				goto use_pio;

drivers/mmc/host/omap_hsmmc.c

+8 −8
Original line number Diff line number Diff line
@@ -1409,11 +1409,18 @@ static int omap_hsmmc_pre_dma_transfer(struct omap_hsmmc_host *host, 
static int omap_hsmmc_setup_dma_transfer(struct omap_hsmmc_host *host,

					struct mmc_request *req)

{

	struct dma_slave_config cfg;

	struct dma_async_tx_descriptor *tx;

	int ret = 0, i;

	struct mmc_data *data = req->data;

	struct dma_chan *chan;

	struct dma_slave_config cfg = {

		.src_addr = host->mapbase + OMAP_HSMMC_DATA,

		.dst_addr = host->mapbase + OMAP_HSMMC_DATA,

		.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,

		.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES,

		.src_maxburst = data->blksz / 4,

		.dst_maxburst = data->blksz / 4,

	};



	/* Sanity check: all the SG entries must be aligned by block size. */

	for (i = 0; i < data->sg_len; i++) {
@@ -1433,13 +1440,6 @@ static int omap_hsmmc_setup_dma_transfer(struct omap_hsmmc_host *host, 


	chan = omap_hsmmc_get_dma_chan(host, data);



	cfg.src_addr = host->mapbase + OMAP_HSMMC_DATA;

	cfg.dst_addr = host->mapbase + OMAP_HSMMC_DATA;

	cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;

	cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;

	cfg.src_maxburst = data->blksz / 4;

	cfg.dst_maxburst = data->blksz / 4;



	ret = dmaengine_slave_config(chan, &cfg);

	if (ret)

		return ret;

drivers/mmc/host/sdhci-st.c

+14 −1
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ 


struct st_mmc_platform_data {

	struct  reset_control *rstc;

	struct  clk *icnclk;

	void __iomem *top_ioaddr;

};
@@ -353,7 +354,7 @@ static int sdhci_st_probe(struct platform_device *pdev) 
	struct sdhci_host *host;

	struct st_mmc_platform_data *pdata;

	struct sdhci_pltfm_host *pltfm_host;

	struct clk *clk;

	struct clk *clk, *icnclk;

	int ret = 0;

	u16 host_version;

	struct resource *res;
@@ -365,6 +366,11 @@ static int sdhci_st_probe(struct platform_device *pdev) 
		return PTR_ERR(clk);

	}



	/* ICN clock isn't compulsory, but use it if it's provided. */

	icnclk = devm_clk_get(&pdev->dev, "icn");

	if (IS_ERR(icnclk))

		icnclk = NULL;



	rstc = devm_reset_control_get(&pdev->dev, NULL);

	if (IS_ERR(rstc))

		rstc = NULL;
@@ -389,6 +395,7 @@ static int sdhci_st_probe(struct platform_device *pdev) 
	}



	clk_prepare_enable(clk);

	clk_prepare_enable(icnclk);



	/* Configure the FlashSS Top registers for setting eMMC TX/RX delay */

	res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
@@ -400,6 +407,7 @@ static int sdhci_st_probe(struct platform_device *pdev) 
	}



	pltfm_host->clk = clk;

	pdata->icnclk = icnclk;



	/* Configure the Arasan HC inside the flashSS */

	st_mmcss_cconfig(np, host);
@@ -422,6 +430,7 @@ static int sdhci_st_probe(struct platform_device *pdev) 
	return 0;



err_out:

	clk_disable_unprepare(icnclk);

	clk_disable_unprepare(clk);

err_of:

	sdhci_pltfm_free(pdev);
@@ -442,6 +451,8 @@ static int sdhci_st_remove(struct platform_device *pdev) 


	ret = sdhci_pltfm_unregister(pdev);



	clk_disable_unprepare(pdata->icnclk);



	if (rstc)

		reset_control_assert(rstc);
@@ -462,6 +473,7 @@ static int sdhci_st_suspend(struct device *dev) 
	if (pdata->rstc)

		reset_control_assert(pdata->rstc);



	clk_disable_unprepare(pdata->icnclk);

	clk_disable_unprepare(pltfm_host->clk);

out:

	return ret;
@@ -475,6 +487,7 @@ static int sdhci_st_resume(struct device *dev) 
	struct device_node *np = dev->of_node;



	clk_prepare_enable(pltfm_host->clk);

	clk_prepare_enable(pdata->icnclk);



	if (pdata->rstc)

		reset_control_deassert(pdata->rstc);