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Commit f2b04cd2 authored by Dave Airlie's avatar Dave Airlie
Browse files

drm/radeon: upgrade to 1.27 - make PCI GART more flexible 



radeon: make PCI GART aperture size variable, but making table size variable
    This is precursor to getting a TTM backend for this stuff, and also
    allows the PCI table to be allocated at fb 0
radeon: add support for reverse engineered xpress200m

    The IGPGART setup code was traced using mmio-trace on fglrx by myself
    and Phillip Ezolt <phillipezolt@gmail.com> on dri-devel.

    This code doesn't let the 3D driver work properly as the card has no
    vertex shader support.

    Thanks to Matthew Garrett + Ubuntu for providing me some hardware to do this
    work on.

Signed-off-by: default avatarDave Airlie <airlied@linux.ie>
parent 5b94f675

drivers/char/drm/ati_pcigart.c

+45 −39
Original line number Diff line number Diff line
@@ -33,59 +33,44 @@ 


#include "drmP.h"



#if PAGE_SIZE == 65536

# define ATI_PCIGART_TABLE_ORDER	0

# define ATI_PCIGART_TABLE_PAGES	(1 << 0)

#elif PAGE_SIZE == 16384

# define ATI_PCIGART_TABLE_ORDER	1

# define ATI_PCIGART_TABLE_PAGES	(1 << 1)

#elif PAGE_SIZE == 8192

# define ATI_PCIGART_TABLE_ORDER 	2

# define ATI_PCIGART_TABLE_PAGES 	(1 << 2)

#elif PAGE_SIZE == 4096

# define ATI_PCIGART_TABLE_ORDER 	3

# define ATI_PCIGART_TABLE_PAGES 	(1 << 3)

#else

# error - PAGE_SIZE not 64K, 16K, 8K or 4K

#endif



# define ATI_MAX_PCIGART_PAGES		8192	/**< 32 MB aperture, 4K pages */

# define ATI_PCIGART_PAGE_SIZE		4096	/**< PCI GART page size */



static void *drm_ati_alloc_pcigart_table(void)

static void *drm_ati_alloc_pcigart_table(int order)

{

	unsigned long address;

	struct page *page;

	int i;

	DRM_DEBUG("%s\n", __FUNCTION__);



	DRM_DEBUG("%s: alloc %d order\n", __FUNCTION__, order);



	address = __get_free_pages(GFP_KERNEL | __GFP_COMP,

				   ATI_PCIGART_TABLE_ORDER);

				   order);

	if (address == 0UL) {

		return NULL;

	}



	page = virt_to_page(address);



	for (i = 0; i < ATI_PCIGART_TABLE_PAGES; i++, page++)

	for (i = 0; i < order; i++, page++)

		SetPageReserved(page);



	DRM_DEBUG("%s: returning 0x%08lx\n", __FUNCTION__, address);

	return (void *)address;

}



static void drm_ati_free_pcigart_table(void *address)

static void drm_ati_free_pcigart_table(void *address, int order)

{

	struct page *page;

	int i;

	int num_pages = 1 << order;

	DRM_DEBUG("%s\n", __FUNCTION__);



	page = virt_to_page((unsigned long)address);



	for (i = 0; i < ATI_PCIGART_TABLE_PAGES; i++, page++)

	for (i = 0; i < num_pages; i++, page++)

		ClearPageReserved(page);



	free_pages((unsigned long)address, ATI_PCIGART_TABLE_ORDER);

	free_pages((unsigned long)address, order);

}



int drm_ati_pcigart_cleanup(drm_device_t *dev, drm_ati_pcigart_info *gart_info)
@@ -93,6 +78,8 @@ int drm_ati_pcigart_cleanup(drm_device_t *dev, drm_ati_pcigart_info *gart_info) 
	drm_sg_mem_t *entry = dev->sg;

	unsigned long pages;

	int i;

	int order;

	int num_pages, max_pages;



	/* we need to support large memory configurations */

	if (!entry) {
@@ -100,15 +87,19 @@ int drm_ati_pcigart_cleanup(drm_device_t *dev, drm_ati_pcigart_info *gart_info) 
		return 0;

	}



	order = drm_order((gart_info->table_size + (PAGE_SIZE-1)) / PAGE_SIZE);

	num_pages = 1 << order;



	if (gart_info->bus_addr) {

		if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {

			pci_unmap_single(dev->pdev, gart_info->bus_addr,

					 ATI_PCIGART_TABLE_PAGES * PAGE_SIZE,

					 num_pages * PAGE_SIZE,

					 PCI_DMA_TODEVICE);

		}



		pages = (entry->pages <= ATI_MAX_PCIGART_PAGES)

		    ? entry->pages : ATI_MAX_PCIGART_PAGES;

		max_pages = (gart_info->table_size / sizeof(u32));

		pages = (entry->pages <= max_pages)

		  ? entry->pages : max_pages;



		for (i = 0; i < pages; i++) {

			if (!entry->busaddr[i])
@@ -123,13 +114,12 @@ int drm_ati_pcigart_cleanup(drm_device_t *dev, drm_ati_pcigart_info *gart_info) 


	if (gart_info->gart_table_location == DRM_ATI_GART_MAIN

	    && gart_info->addr) {

		drm_ati_free_pcigart_table(gart_info->addr);

		drm_ati_free_pcigart_table(gart_info->addr, order);

		gart_info->addr = NULL;

	}



	return 1;

}



EXPORT_SYMBOL(drm_ati_pcigart_cleanup);



int drm_ati_pcigart_init(drm_device_t *dev, drm_ati_pcigart_info *gart_info)
@@ -139,6 +129,9 @@ int drm_ati_pcigart_init(drm_device_t *dev, drm_ati_pcigart_info *gart_info) 
	unsigned long pages;

	u32 *pci_gart, page_base, bus_address = 0;

	int i, j, ret = 0;

	int order;

	int max_pages;

	int num_pages;



	if (!entry) {

		DRM_ERROR("no scatter/gather memory!\n");
@@ -148,7 +141,10 @@ int drm_ati_pcigart_init(drm_device_t *dev, drm_ati_pcigart_info *gart_info) 
	if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {

		DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");



		address = drm_ati_alloc_pcigart_table();

		order = drm_order((gart_info->table_size +

				   (PAGE_SIZE-1)) / PAGE_SIZE);

		num_pages = 1 << order;

		address = drm_ati_alloc_pcigart_table(order);

		if (!address) {

			DRM_ERROR("cannot allocate PCI GART page!\n");

			goto done;
@@ -160,11 +156,13 @@ int drm_ati_pcigart_init(drm_device_t *dev, drm_ati_pcigart_info *gart_info) 
		}



		bus_address = pci_map_single(dev->pdev, address,

					     ATI_PCIGART_TABLE_PAGES *

					     PAGE_SIZE, PCI_DMA_TODEVICE);

					     num_pages * PAGE_SIZE,

					     PCI_DMA_TODEVICE);

		if (bus_address == 0) {

			DRM_ERROR("unable to map PCIGART pages!\n");

			drm_ati_free_pcigart_table(address);

			order = drm_order((gart_info->table_size +

					   (PAGE_SIZE-1)) / PAGE_SIZE);

			drm_ati_free_pcigart_table(address, order);

			address = NULL;

			goto done;

		}
@@ -177,10 +175,11 @@ int drm_ati_pcigart_init(drm_device_t *dev, drm_ati_pcigart_info *gart_info) 


	pci_gart = (u32 *) address;



	pages = (entry->pages <= ATI_MAX_PCIGART_PAGES)

	    ? entry->pages : ATI_MAX_PCIGART_PAGES;

	max_pages = (gart_info->table_size / sizeof(u32));

	pages = (entry->pages <= max_pages)

	    ? entry->pages : max_pages;



	memset(pci_gart, 0, ATI_MAX_PCIGART_PAGES * sizeof(u32));

	memset(pci_gart, 0, max_pages * sizeof(u32));



	for (i = 0; i < pages; i++) {

		/* we need to support large memory configurations */
@@ -198,10 +197,18 @@ int drm_ati_pcigart_init(drm_device_t *dev, drm_ati_pcigart_info *gart_info) 
		page_base = (u32) entry->busaddr[i];



		for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) {

			if (gart_info->is_pcie)

			switch(gart_info->gart_reg_if) {

			case DRM_ATI_GART_IGP:

				*pci_gart = cpu_to_le32((page_base) | 0xc);

				break;

			case DRM_ATI_GART_PCIE:

				*pci_gart = cpu_to_le32((page_base >> 8) | 0xc);

			else

				break;

			default:

			case DRM_ATI_GART_PCI:

				*pci_gart = cpu_to_le32(page_base);

				break;

			}

			pci_gart++;

			page_base += ATI_PCIGART_PAGE_SIZE;

		}
@@ -220,5 +227,4 @@ int drm_ati_pcigart_init(drm_device_t *dev, drm_ati_pcigart_info *gart_info) 
	gart_info->bus_addr = bus_address;

	return ret;

}



EXPORT_SYMBOL(drm_ati_pcigart_init);

drivers/char/drm/drmP.h

+6 −1
Original line number Diff line number Diff line
@@ -519,12 +519,17 @@ typedef struct drm_vbl_sig { 
#define DRM_ATI_GART_MAIN 1

#define DRM_ATI_GART_FB   2



#define DRM_ATI_GART_PCI 1

#define DRM_ATI_GART_PCIE 2

#define DRM_ATI_GART_IGP 3



typedef struct ati_pcigart_info {

	int gart_table_location;

	int is_pcie;

	int gart_reg_if;

	void *addr;

	dma_addr_t bus_addr;

	drm_local_map_t mapping;

	int table_size;

} drm_ati_pcigart_info;



/*

drivers/char/drm/drm_pciids.h

+1 −0
Original line number Diff line number Diff line
@@ -102,6 +102,7 @@ 
	{0x1002, 0x5653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \

	{0x1002, 0x5834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP}, \

	{0x1002, 0x5835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \

	{0x1002, 0x5955, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \

	{0x1002, 0x5960, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \

	{0x1002, 0x5961, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \

	{0x1002, 0x5962, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \

drivers/char/drm/r128_cce.c

+2 −1
Original line number Diff line number Diff line
@@ -560,9 +560,10 @@ static int r128_do_init_cce(drm_device_t * dev, drm_r128_init_t * init) 
	if (dev_priv->is_pci) {

#endif

		dev_priv->gart_info.gart_table_location = DRM_ATI_GART_MAIN;

		dev_priv->gart_info.table_size = R128_PCIGART_TABLE_SIZE;

		dev_priv->gart_info.addr = NULL;

		dev_priv->gart_info.bus_addr = 0;

		dev_priv->gart_info.is_pcie = 0;

		dev_priv->gart_info.gart_reg_if = DRM_ATI_GART_PCI;

		if (!drm_ati_pcigart_init(dev, &dev_priv->gart_info)) {

			DRM_ERROR("failed to init PCI GART!\n");

			dev->dev_private = (void *)dev_priv;

drivers/char/drm/r128_drv.h

+2 −0
Original line number Diff line number Diff line
@@ -383,6 +383,8 @@ extern long r128_compat_ioctl(struct file *filp, unsigned int cmd, 


#define R128_PERFORMANCE_BOXES		0



#define R128_PCIGART_TABLE_SIZE         32768



#define R128_READ(reg)		DRM_READ32(  dev_priv->mmio, (reg) )

#define R128_WRITE(reg,val)	DRM_WRITE32( dev_priv->mmio, (reg), (val) )

#define R128_READ8(reg)		DRM_READ8(   dev_priv->mmio, (reg) )