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Commit f21d5adc authored by Kan Liang's avatar Kan Liang Committed by Ingo Molnar
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perf/x86/intel: Add LBR filter support for Silvermont and Airmont CPUs 



LBR filtering is also supported on the Silvermont and Airmont
microarchitectures. The layout of MSR_LBR_SELECT is the same as Nehalem.

Signed-off-by: default avatarKan Liang <kan.liang@intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Stephane Eranian <eranian@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vince Weaver <vincent.weaver@maine.edu>
Link: http://lkml.kernel.org/r/1460706825-46163-1-git-send-email-kan.liang@intel.com


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 8b92c3a7

arch/x86/events/intel/core.c

+1 −1
Original line number Diff line number Diff line
@@ -3581,7 +3581,7 @@ __init int intel_pmu_init(void) 
		memcpy(hw_cache_extra_regs, slm_hw_cache_extra_regs,

		       sizeof(hw_cache_extra_regs));



		intel_pmu_lbr_init_atom();

		intel_pmu_lbr_init_slm();



		x86_pmu.event_constraints = intel_slm_event_constraints;

		x86_pmu.pebs_constraints = intel_slm_pebs_event_constraints;

arch/x86/events/intel/lbr.c

+18 −0
Original line number Diff line number Diff line
@@ -1058,6 +1058,24 @@ void __init intel_pmu_lbr_init_atom(void) 
	pr_cont("8-deep LBR, ");

}



/* slm */

void __init intel_pmu_lbr_init_slm(void)

{

	x86_pmu.lbr_nr	   = 8;

	x86_pmu.lbr_tos    = MSR_LBR_TOS;

	x86_pmu.lbr_from   = MSR_LBR_CORE_FROM;

	x86_pmu.lbr_to     = MSR_LBR_CORE_TO;



	x86_pmu.lbr_sel_mask = LBR_SEL_MASK;

	x86_pmu.lbr_sel_map  = nhm_lbr_sel_map;



	/*

	 * SW branch filter usage:

	 * - compensate for lack of HW filter

	 */

	pr_cont("8-deep LBR, ");

}



/* Knights Landing */

void intel_pmu_lbr_init_knl(void)

{

arch/x86/events/perf_event.h

+2 −0
Original line number Diff line number Diff line
@@ -909,6 +909,8 @@ void intel_pmu_lbr_init_nhm(void); 


void intel_pmu_lbr_init_atom(void);



void intel_pmu_lbr_init_slm(void);



void intel_pmu_lbr_init_snb(void);



void intel_pmu_lbr_init_hsw(void);