Merge branch 'next/devel-s3c24xx-hsspi' into next/devel-samsung (f1cb86ec) · Commits · e / devices / android_kernel_teracube_emerald

arch/arm/mach-s3c24xx/Kconfig

+5 −0

Original line number	Diff line number	Diff line
		@@ -518,6 +518,11 @@ config S3C2443_DMA
		help
		Internal config node for S3C2443 DMA support

		config S3C2443_SETUP_SPI
		bool
		help
		Common setup code for SPI GPIO configurations

		endif # CPU_S3C2443 \|\| CPU_S3C2416

		if CPU_S3C2443

+1 −0

Original line number	Diff line number	Diff line
		@@ -91,5 +91,6 @@ obj-$(CONFIG_MACH_OSIRIS_DVS) += mach-osiris-dvs.o
		# device setup

		obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
		obj-$(CONFIG_S3C2443_SETUP_SPI) += setup-spi.o
		obj-$(CONFIG_ARCH_S3C24XX) += setup-i2c.o
		obj-$(CONFIG_S3C24XX_SETUP_TS) += setup-ts.o

+1 −0

Original line number	Diff line number	Diff line
		@@ -144,6 +144,7 @@ static struct clk_lookup s3c2416_clk_lookup[] = {
		CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.0", &hsmmc0_clk),
		CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &hsmmc_mux0.clk),
		CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &hsmmc_mux1.clk),
		CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &hsspi_mux.clk),
		};

		void __init s3c2416_init_clocks(int xtal)

+6 −0

Original line number	Diff line number	Diff line
		@@ -179,6 +179,11 @@ static struct clk *clks[] __initdata = {
		&clk_hsmmc,
		};

		static struct clk_lookup s3c2443_clk_lookup[] = {
		CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_hsmmc),
		CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk2", &clk_hsspi.clk),
		};

		void __init s3c2443_init_clocks(int xtal)
		{
		unsigned long epllcon = __raw_readl(S3C2443_EPLLCON);
		@@ -210,6 +215,7 @@ void __init s3c2443_init_clocks(int xtal)

		s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
		s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
		clkdev_add_table(s3c2443_clk_lookup, ARRAY_SIZE(s3c2443_clk_lookup));

		s3c_pwmclk_init();
		}

+10 −5

Original line number	Diff line number	Diff line
		@@ -423,11 +423,6 @@ static struct clk init_clocks_off[] = {
		.parent = &clk_p,
		.enable = s3c2443_clkcon_enable_p,
		.ctrlbit = S3C2443_PCLKCON_IIS,
		}, {
		.name = "hsspi",
		.parent = &clk_p,
		.enable = s3c2443_clkcon_enable_p,
		.ctrlbit = S3C2443_PCLKCON_HSSPI,
		}, {
		.name = "adc",
		.parent = &clk_p,
		@@ -562,6 +557,14 @@ static struct clk hsmmc1_clk = {
		.ctrlbit = S3C2443_HCLKCON_HSMMC,
		};

		static struct clk hsspi_clk = {
		.name = "spi",
		.devname = "s3c64xx-spi.0",
		.parent = &clk_p,
		.enable = s3c2443_clkcon_enable_p,
		.ctrlbit = S3C2443_PCLKCON_HSSPI,
		};

		/* EPLLCON compatible enough to get on/off information */

		void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll)
		@@ -612,6 +615,7 @@ static struct clk *clks[] __initdata = {
		&clk_usb_bus,
		&clk_armdiv,
		&hsmmc1_clk,
		&hsspi_clk,
		};

		static struct clksrc_clk *clksrcs[] __initdata = {
		@@ -629,6 +633,7 @@ static struct clk_lookup s3c2443_clk_lookup[] = {
		CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
		CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_esys_uart.clk),
		CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.0", &hsmmc1_clk),
		CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk0", &hsspi_clk),
		};

		void __init s3c2443_common_init_clocks(int xtal, pll_fn get_mpll,