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Commit f1c09c3e authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v4.7-rockchip-dts64-2' of... 

Merge tag 'v4.7-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt64

Merge "Rockchip dts64 updates for v4.7 - part2" from Heiko Stübner:

Adding the new rk3399 core devicetree support as well as a board
dts for the evaluation board of this chip and similar to the arm32
side also move the rk3368 thermal data into the core soc dtsi, as
there really is no need to keep it separate.

* tag 'v4.7-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  dt-bindings: document rockchip rk3399-evb board
  arm64: dts: rockchip: add dts file for RK3399 evaluation board
  arm64: dts: rockchip: add core dtsi file for RK3399 SoCs
  dt-bindings: rockchip-dw-mshc: add description for rk3399
  clk: rockchip: export some necessary rk3399 clock ids
  clk: rockchip: rename rga clock-id on rk3399
  clk: rockchip: add general gpu soft-reset on rk3399
  arm64: dts: rockchip: move the rk3368 thermal data into rk3368.dtsi
  clk: rockchip: fix checkpatch errors in rk3399 dt-binding header
  clk: rockchip: add dt-binding header for rk3399
parents 41caed56 51c454d2

Documentation/devicetree/bindings/arm/rockchip.txt

+5 −1
Original line number Diff line number Diff line
@@ -102,3 +102,7 @@ Rockchip platforms device tree bindings 
- Rockchip RK3228 Evaluation board:

    Required root node properties:

     - compatible = "rockchip,rk3228-evb", "rockchip,rk3228";



- Rockchip RK3399 evb:

    Required root node properties:

      - compatible = "rockchip,rk3399-evb", "rockchip,rk3399";

Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.txt

+1 −0
Original line number Diff line number Diff line
@@ -15,6 +15,7 @@ Required Properties: 
	- "rockchip,rk3288-dw-mshc": for Rockchip RK3288

	- "rockchip,rk3036-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3036

	- "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3368

	- "rockchip,rk3399-dw-mshc", "rockchip,rk3288-dw-mshc": for Rockchip RK3399



Optional Properties:

* clocks: from common clock binding: if ciu_drive and ciu_sample are

arch/arm64/boot/dts/rockchip/Makefile

+1 −0
Original line number Diff line number Diff line 
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb



always		:= $(dtb-y)

subdir-y	:= $(dts-dirs)

arch/arm64/boot/dts/rockchip/rk3368.dtsi

+65 −1
Original line number Diff line number Diff line
@@ -413,7 +413,71 @@ 
	};



	thermal-zones {

		#include "rk3368-thermal.dtsi"

		cpu {

			polling-delay-passive = <100>; /* milliseconds */

			polling-delay = <5000>; /* milliseconds */



			thermal-sensors = <&tsadc 0>;



			trips {

				cpu_alert0: cpu_alert0 {

					temperature = <75000>; /* millicelsius */

					hysteresis = <2000>; /* millicelsius */

					type = "passive";

				};

				cpu_alert1: cpu_alert1 {

					temperature = <80000>; /* millicelsius */

					hysteresis = <2000>; /* millicelsius */

					type = "passive";

				};

				cpu_crit: cpu_crit {

					temperature = <95000>; /* millicelsius */

					hysteresis = <2000>; /* millicelsius */

					type = "critical";

				};

			};



			cooling-maps {

				map0 {

					trip = <&cpu_alert0>;

					cooling-device =

					<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

				};

				map1 {

					trip = <&cpu_alert1>;

					cooling-device =

					<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

				};

			};

		};



		gpu {

			polling-delay-passive = <100>; /* milliseconds */

			polling-delay = <5000>; /* milliseconds */



			thermal-sensors = <&tsadc 1>;



			trips {

				gpu_alert0: gpu_alert0 {

					temperature = <80000>; /* millicelsius */

					hysteresis = <2000>; /* millicelsius */

					type = "passive";

				};

				gpu_crit: gpu_crit {

					temperature = <115000>; /* millicelsius */

					hysteresis = <2000>; /* millicelsius */

					type = "critical";

				};

			};



			cooling-maps {

				map0 {

					trip = <&gpu_alert0>;

					cooling-device =

					<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

				};

			};

		};

	};



	tsadc: tsadc@ff280000 {

arch/arm64/boot/dts/rockchip/rk3368-thermal.dtsi→arch/arm64/boot/dts/rockchip/rk3399-evb.dts

+68 −56
Original line number Diff line number Diff line 
/*

 * Device Tree Source for RK3368 SoC thermal

 *

 * Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd

 * Caesar Wang <wxt@rock-chips.com>

 * Copyright (c) 2016 Fuzhou Rockchip Electronics Co., Ltd

 *

 * This file is dual-licensed: you can use it either under the terms

 * of the GPL or the X11 license, at your option. Note that this dual
@@ -43,70 +40,85 @@ 
 *     OTHER DEALINGS IN THE SOFTWARE.

 */



#include <dt-bindings/thermal/thermal.h>



cpu_thermal: cpu_thermal {

	polling-delay-passive = <100>; /* milliseconds */

	polling-delay = <5000>; /* milliseconds */

/dts-v1/;

#include <dt-bindings/pwm/pwm.h>

#include "rk3399.dtsi"



	thermal-sensors = <&tsadc 0>;

/ {

	model = "Rockchip RK3399 Evaluation Board";

	compatible = "rockchip,rk3399-evb", "rockchip,rk3399",

		     "google,rk3399evb-rev2";



	trips {

		cpu_alert0: cpu_alert0 {

			temperature = <75000>; /* millicelsius */

			hysteresis = <2000>; /* millicelsius */

			type = "passive";

	vdd_center: vdd-center {

		compatible = "pwm-regulator";

		pwms = <&pwm3 0 25000 0>;

		regulator-name = "vdd_center";

		regulator-min-microvolt = <800000>;

		regulator-max-microvolt = <1400000>;

		regulator-always-on;

		regulator-boot-on;

		status = "okay";

	};

		cpu_alert1: cpu_alert1 {

			temperature = <80000>; /* millicelsius */

			hysteresis = <2000>; /* millicelsius */

			type = "passive";



	vcc3v3_sys: vcc3v3-sys {

		compatible = "regulator-fixed";

		regulator-name = "vcc3v3_sys";

		regulator-always-on;

		regulator-boot-on;

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

	};

		cpu_crit: cpu_crit {

			temperature = <95000>; /* millicelsius */

			hysteresis = <2000>; /* millicelsius */

			type = "critical";



	vcc_phy: vcc-phy-regulator {

		compatible = "regulator-fixed";

		regulator-name = "vcc_phy";

		regulator-always-on;

		regulator-boot-on;

	};

};



	cooling-maps {

		map0 {

			trip = <&cpu_alert0>;

			cooling-device =

				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

&pwm0 {

	status = "okay";

};

		map1 {

			trip = <&cpu_alert1>;

			cooling-device =

				<&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;



&pwm2 {

	status = "okay";

};



&pwm3 {

	status = "okay";

};



&uart2 {

	status = "okay";

};



gpu_thermal: gpu_thermal {

	polling-delay-passive = <100>; /* milliseconds */

	polling-delay = <5000>; /* milliseconds */

&usb_host0_ehci {

	status = "okay";

};



	thermal-sensors = <&tsadc 1>;

&usb_host0_ohci {

	status = "okay";

};



	trips {

		gpu_alert0: gpu_alert0 {

			temperature = <80000>; /* millicelsius */

			hysteresis = <2000>; /* millicelsius */

			type = "passive";

&usb_host1_ehci {

	status = "okay";

};

		gpu_crit: gpu_crit {

			temperature = <1150000>; /* millicelsius */

			hysteresis = <2000>; /* millicelsius */

			type = "critical";



&usb_host1_ohci {

	status = "okay";

};



&pinctrl {

	pmic {

		pmic_int_l: pmic-int-l {

			rockchip,pins =

				<1 21 RK_FUNC_GPIO &pcfg_pull_up>;

		};



	cooling-maps {

		map0 {

			trip = <&gpu_alert0>;

			cooling-device =

				<&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

		pmic_dvs2: pmic-dvs2 {

			rockchip,pins =

				<1 18 RK_FUNC_GPIO &pcfg_pull_down>;

		};

	};

};