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Commit f167211a authored by Will Deacon's avatar Will Deacon Committed by Catalin Marinas
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arm64: entry: Reword comment about post_ttbr_update_workaround 



We don't fully understand the Cavium ThunderX erratum, but it appears
that mapping the kernel as nG can lead to horrible consequences such as
attempting to execute userspace from kernel context. Since kpti isn't
enabled for these CPUs anyway, simplify the comment justifying the lack
of post_ttbr_update_workaround in the exception trampoline.

Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent fa0465fc

arch/arm64/kernel/entry.S

+3 −10
Original line number Original line Diff line number Diff line
@@ -1013,16 +1013,9 @@ alternative_else_nop_endif 
	orr	\tmp, \tmp, #USER_ASID_FLAG

	orr	\tmp, \tmp, #USER_ASID_FLAG

	msr	ttbr1_el1, \tmp

	msr	ttbr1_el1, \tmp

	/*

	/*

	 * We avoid running the post_ttbr_update_workaround here because the

	 * We avoid running the post_ttbr_update_workaround here because

	 * user and kernel ASIDs don't have conflicting mappings, so any

	 * it's only needed by Cavium ThunderX, which requires KPTI to be

	 * "blessing" as described in:

	 * disabled.

	 *

	 *   http://lkml.kernel.org/r/56BB848A.6060603@caviumnetworks.com

	 *

	 * will not hurt correctness. Whilst this may partially defeat the

	 * point of using split ASIDs in the first place, it avoids

	 * the hit of invalidating the entire I-cache on every return to

	 * userspace.

	 */

	 */

	.endm

	.endm